Commit b14ef613 authored by Andy Shevchenko's avatar Andy Shevchenko
Browse files

pinctrl: intel: Add Intel Moorefield pin controller support 



This driver adds pinctrl support for Intel Moorefield. The IP block
which is called Family-Level Interface Shim is a separate entity in SoC.
The GPIO driver, which supports this pinctrl interface, will be
submitted separately.

Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
parent 3886bc35

drivers/pinctrl/intel/Kconfig

+11 −0
Original line number Diff line number Diff line
@@ -47,6 +47,17 @@ config PINCTRL_MERRIFIELD 
	  interface that allows configuring of SoC pins and using them as

	  GPIOs.



config PINCTRL_MOOREFIELD

	tristate "Intel Moorefield pinctrl driver"

	depends on X86_INTEL_MID

	select PINMUX

	select PINCONF

	select GENERIC_PINCONF

	help

	  Moorefield Family-Level Interface Shim (FLIS) driver provides an

	  interface that allows configuring of SoC pins and using them as

	  GPIOs.



config PINCTRL_INTEL

	tristate

	select PINMUX

drivers/pinctrl/intel/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ obj-$(CONFIG_PINCTRL_BAYTRAIL) += pinctrl-baytrail.o 
obj-$(CONFIG_PINCTRL_CHERRYVIEW)	+= pinctrl-cherryview.o

obj-$(CONFIG_PINCTRL_LYNXPOINT)		+= pinctrl-lynxpoint.o

obj-$(CONFIG_PINCTRL_MERRIFIELD)	+= pinctrl-merrifield.o

obj-$(CONFIG_PINCTRL_MOOREFIELD)	+= pinctrl-moorefield.o

obj-$(CONFIG_PINCTRL_INTEL)		+= pinctrl-intel.o

obj-$(CONFIG_PINCTRL_ALDERLAKE)		+= pinctrl-alderlake.o

obj-$(CONFIG_PINCTRL_BROXTON)		+= pinctrl-broxton.o

drivers/pinctrl/intel/pinctrl-moorefield.c

0 → 100644
+916 −0

File added.

Preview size limit exceeded, changes collapsed.