Commit b1706b91 authored by Torsten Seeboth's avatar Torsten Seeboth Committed by Linus Torvalds
Browse files

[PATCH] v4l: 648: some clean up in cx88 tvaudio c 



- Some clean up in cx88-tvaudio.c

Signed-off-by: default avatarTorsten Seeboth <Torsten.Seeboth@t-online.de>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@brturbo.com.br>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent c35d4b84

drivers/media/video/cx88/cx88-core.c

+5 −5
Original line number Diff line number Diff line
@@ -845,19 +845,19 @@ static int set_tvaudio(struct cx88_core *core) 
		return 0;



	if (V4L2_STD_PAL_BG & norm->id) {

		core->tvaudio = nicam ? WW_NICAM_BGDKL : WW_A2_BG;

		core->tvaudio = WW_BG;



	} else if (V4L2_STD_PAL_DK & norm->id) {

		core->tvaudio = nicam ? WW_NICAM_BGDKL : WW_A2_DK;

		core->tvaudio = WW_DK;



	} else if (V4L2_STD_PAL_I & norm->id) {

		core->tvaudio = WW_NICAM_I;

		core->tvaudio = WW_I;



	} else if (V4L2_STD_SECAM_L & norm->id) {

		core->tvaudio = WW_SYSTEM_L_AM;

		core->tvaudio = WW_L;



	} else if (V4L2_STD_SECAM_DK & norm->id) {

		core->tvaudio = WW_A2_DK;

		core->tvaudio = WW_DK;



	} else if ((V4L2_STD_NTSC_M & norm->id) ||

		   (V4L2_STD_PAL_M  & norm->id)) {

drivers/media/video/cx88/cx88-tvaudio.c

+311 −332
Original line number Diff line number Diff line
@@ -271,87 +271,10 @@ static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap, u3 
	}

}





static void set_audio_standard_NICAM_L(struct cx88_core *core, int stereo)

static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)

{

	/* This is probably weird..

	* Let's operate and find out. */



	static const struct rlist nicam_l_mono[] = {

		{ AUD_ERRLOGPERIOD_R,     0x00000064 },

		{ AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF },

		{ AUD_ERRINTRPTTHSHLD2_R, 0x0000001F },

		{ AUD_ERRINTRPTTHSHLD3_R, 0x0000000F },



		{ AUD_PDF_DDS_CNST_BYTE2, 0x48 },

		{ AUD_PDF_DDS_CNST_BYTE1, 0x3D },

		{ AUD_QAM_MODE,           0x00 },

		{ AUD_PDF_DDS_CNST_BYTE0, 0xf5 },

		{ AUD_PHACC_FREQ_8MSB,    0x3a },

		{ AUD_PHACC_FREQ_8LSB,    0x4a },



		{ AUD_DEEMPHGAIN_R, 0x6680 },

		{ AUD_DEEMPHNUMER1_R, 0x353DE },

		{ AUD_DEEMPHNUMER2_R, 0x1B1 },

		{ AUD_DEEMPHDENOM1_R, 0x0F3D0 },

		{ AUD_DEEMPHDENOM2_R, 0x0 },

		{ AUD_FM_MODE_ENABLE, 0x7 },

		{ AUD_POLYPH80SCALEFAC, 0x3 },

		{ AUD_AFE_12DB_EN, 0x1 },

		{ AAGC_GAIN, 0x0 },

		{ AAGC_HYST, 0x18 },

		{ AAGC_DEF, 0x20 },

		{ AUD_DN0_FREQ, 0x0 },

		{ AUD_POLY0_DDS_CONSTANT, 0x0E4DB2 },

		{ AUD_DCOC_0_SRC, 0x21 },

		{ AUD_IIR1_0_SEL, 0x0 },

		{ AUD_IIR1_0_SHIFT, 0x7 },

		{ AUD_IIR1_1_SEL, 0x2 },

		{ AUD_IIR1_1_SHIFT, 0x0 },

		{ AUD_DCOC_1_SRC, 0x3 },

		{ AUD_DCOC1_SHIFT, 0x0 },

		{ AUD_DCOC_PASS_IN, 0x0 },

		{ AUD_IIR1_2_SEL, 0x23 },

		{ AUD_IIR1_2_SHIFT, 0x0 },

		{ AUD_IIR1_3_SEL, 0x4 },

		{ AUD_IIR1_3_SHIFT, 0x7 },

		{ AUD_IIR1_4_SEL, 0x5 },

		{ AUD_IIR1_4_SHIFT, 0x7 },

		{ AUD_IIR3_0_SEL, 0x7 },

		{ AUD_IIR3_0_SHIFT, 0x0 },

		{ AUD_DEEMPH0_SRC_SEL, 0x11 },

		{ AUD_DEEMPH0_SHIFT, 0x0 },

		{ AUD_DEEMPH0_G0, 0x7000 },

		{ AUD_DEEMPH0_A0, 0x0 },

		{ AUD_DEEMPH0_B0, 0x0 },

		{ AUD_DEEMPH0_A1, 0x0 },

		{ AUD_DEEMPH0_B1, 0x0 },

		{ AUD_DEEMPH1_SRC_SEL, 0x11 },

		{ AUD_DEEMPH1_SHIFT, 0x0 },

		{ AUD_DEEMPH1_G0, 0x7000 },

		{ AUD_DEEMPH1_A0, 0x0 },

		{ AUD_DEEMPH1_B0, 0x0 },

		{ AUD_DEEMPH1_A1, 0x0 },

		{ AUD_DEEMPH1_B1, 0x0 },

		{ AUD_OUT0_SEL, 0x3F },

		{ AUD_OUT1_SEL, 0x3F },

		{ AUD_DMD_RA_DDS, 0x0F5C285 },

		{ AUD_PLL_INT, 0x1E },

		{ AUD_PLL_DDS, 0x0 },

		{ AUD_PLL_FRAC, 0x0E542 },



		// setup QAM registers

		{ AUD_RATE_ADJ1,      0x00000100 },

		{ AUD_RATE_ADJ2,      0x00000200 },

		{ AUD_RATE_ADJ3,      0x00000300 },

		{ AUD_RATE_ADJ4,      0x00000400 },

		{ AUD_RATE_ADJ5,      0x00000500 },

		{ AUD_RATE_THRES_DMD, 0x000000C0 },

		{ /* end of list */ },

	};



	static const struct rlist nicam_l[] = {

		// setup QAM registers

	{ AUD_AFE_12DB_EN,         0x00000001},

	{ AUD_RATE_ADJ1, 	   0x00000060 },

	{ AUD_RATE_ADJ2,	   0x000000F9 },

	{ AUD_RATE_ADJ3, 	   0x000001CC },
@@ -373,146 +296,77 @@ static void set_audio_standard_NICAM_L(struct cx88_core *core, int stereo) 
	{ AUD_DEEMPHNUMER2_R,      0x000001B1 },

	{ AUD_PDF_DDS_CNST_BYTE2,  0x06 },

	{ AUD_PDF_DDS_CNST_BYTE1,  0x82 },

		{ AUD_QAM_MODE, 0x05 },

	{ AUD_PDF_DDS_CNST_BYTE0,  0x12 },

	{ AUD_QAM_MODE, 	   0x05 },

	{ AUD_PHACC_FREQ_8MSB,     0x34 },

	{ AUD_PHACC_FREQ_8LSB,     0x4C },

	{ AUD_DEEMPHGAIN_R, 	   0x00006680 },

	{ AUD_RATE_THRES_DMD,      0x000000C0  },

	{ /* end of list */ },

	} ;

	dprintk("%s (status: devel), stereo : %d\n",__FUNCTION__,stereo);



	if (!stereo) {

	/* AM Mono */

		set_audio_start(core, SEL_A2);

		set_audio_registers(core, nicam_l_mono);

	set_audio_finish(core, EN_A2_FORCE_MONO1);

	} else {

	/* Nicam Stereo */

		set_audio_start(core, SEL_NICAM);

		set_audio_registers(core, nicam_l);

	set_audio_finish(core, 0x1924); /* FIXME */

	}

}



static void set_audio_standard_PAL_I(struct cx88_core *core, int stereo)

{

       static const struct rlist pal_i_fm_mono[] = {

	{AUD_ERRLOGPERIOD_R,       0x00000064},

	{AUD_ERRINTRPTTHSHLD1_R,   0x00000fff},

	{AUD_ERRINTRPTTHSHLD2_R,   0x0000001f},

	{AUD_ERRINTRPTTHSHLD3_R,   0x0000000f},

	{AUD_PDF_DDS_CNST_BYTE2,   0x06},

	{AUD_PDF_DDS_CNST_BYTE1,   0x82},

	{AUD_PDF_DDS_CNST_BYTE0,   0x12},

	{AUD_QAM_MODE,             0x05},

	{AUD_PHACC_FREQ_8MSB,      0x3a},

	{AUD_PHACC_FREQ_8LSB,      0x93},

	{AUD_DMD_RA_DDS,           0x002a4f2f},

	{AUD_PLL_INT,              0x0000001e},

	{AUD_PLL_DDS,              0x00000004},

	{AUD_PLL_FRAC,             0x0000e542},

	{AUD_RATE_ADJ1,            0x00000100},

	{AUD_RATE_ADJ2,            0x00000200},

	{AUD_RATE_ADJ3,            0x00000300},

	{AUD_RATE_ADJ4,            0x00000400},

	{AUD_RATE_ADJ5,            0x00000500},

	{AUD_THR_FR,               0x00000000},

	{AUD_PILOT_BQD_1_K0,       0x0000755b},

	{AUD_PILOT_BQD_1_K1,       0x00551340},

	{AUD_PILOT_BQD_1_K2,       0x006d30be},

	{AUD_PILOT_BQD_1_K3,       0xffd394af},

	{AUD_PILOT_BQD_1_K4,       0x00400000},

	{AUD_PILOT_BQD_2_K0,       0x00040000},

	{AUD_PILOT_BQD_2_K1,       0x002a4841},

	{AUD_PILOT_BQD_2_K2,       0x00400000},

	{AUD_PILOT_BQD_2_K3,       0x00000000},

	{AUD_PILOT_BQD_2_K4,       0x00000000},

	{AUD_MODE_CHG_TIMER,       0x00000060},

	static const struct rlist nicam_bgdki_common[] = {

	{ AUD_AFE_12DB_EN,         0x00000001},

	{AAGC_HYST,                0x0000000a},

	{AUD_CORDIC_SHIFT_0,       0x00000007},

	{AUD_CORDIC_SHIFT_1,       0x00000007},

	{AUD_C1_UP_THR,            0x00007000},

	{AUD_C1_LO_THR,            0x00005400},

	{AUD_C2_UP_THR,            0x00005400},

	{AUD_C2_LO_THR,            0x00003000},

	{AUD_DCOC_0_SRC,           0x0000001a},

	{AUD_DCOC0_SHIFT,          0x00000000},

	{AUD_DCOC_0_SHIFT_IN0,     0x0000000a},

	{AUD_DCOC_0_SHIFT_IN1,     0x00000008},

	{AUD_DCOC_PASS_IN,         0x00000003},

	{AUD_IIR3_0_SEL,           0x00000021},

	{AUD_DN2_AFC,              0x00000002},

	{AUD_DCOC_1_SRC,           0x0000001b},

	{AUD_DCOC1_SHIFT,          0x00000000},

	{AUD_DCOC_1_SHIFT_IN0,     0x0000000a},

	{AUD_DCOC_1_SHIFT_IN1,     0x00000008},

	{AUD_IIR3_1_SEL,           0x00000023},

	{AUD_DN0_FREQ,             0x000035a3},

	{AUD_DN2_FREQ,             0x000029c7},

	{AUD_CRDC0_SRC_SEL,        0x00000511},

	{AUD_IIR1_0_SEL,           0x00000001},

	{AUD_IIR1_1_SEL,           0x00000000},

	{AUD_IIR3_2_SEL,           0x00000003},

	{AUD_IIR3_2_SHIFT,         0x00000000},

	{AUD_IIR3_0_SEL,           0x00000002},

	{AUD_IIR2_0_SEL,           0x00000021},

	{AUD_IIR2_0_SHIFT,         0x00000002},

	{AUD_DEEMPH0_SRC_SEL,      0x0000000b},

	{AUD_DEEMPH1_SRC_SEL,      0x0000000b},

	{AUD_POLYPH80SCALEFAC,     0x00000001},

	{AUD_START_TIMER,          0x00000000},

	{ /* end of list */ },

       };



       static const struct rlist pal_i_nicam[] = {

	{ AUD_RATE_ADJ1,           0x00000010 },

	{ AUD_RATE_ADJ2,           0x00000040 },

	{ AUD_RATE_ADJ3,           0x00000100 },

	{ AUD_RATE_ADJ4,           0x00000400 },

	{ AUD_RATE_ADJ5,           0x00001000 },

	//{ AUD_DMD_RA_DDS,        0x00c0d5ce },

	{ AUD_DEEMPHGAIN_R,        0x000023c2 },

	{ AUD_DEEMPHNUMER1_R,      0x0002a7bc },

	{ AUD_DEEMPHNUMER2_R,      0x0003023e },

	{ AUD_DEEMPHDENOM1_R,      0x0000f3d0 },

	{ AUD_DEEMPHDENOM2_R,      0x00000000 },

	{ AUD_DEEMPHDENOM2_R,      0x00000000 },

	{ AUD_ERRLOGPERIOD_R,	   0x00000fff},

	{ AUD_ERRINTRPTTHSHLD1_R,  0x000003ff},

	{ AUD_ERRINTRPTTHSHLD2_R,  0x000000ff},

	{ AUD_ERRINTRPTTHSHLD3_R,  0x0000003f},

	{ AUD_POLYPH80SCALEFAC,    0x00000003},

	{ AUD_PDF_DDS_CNST_BYTE2,  0x06 },

	{ AUD_DEEMPHGAIN_R,        0x000023c2},

	{ AUD_DEEMPHNUMER1_R,      0x0002a7bc},

	{ AUD_DEEMPHNUMER2_R,      0x0003023e},

	{ AUD_DEEMPHDENOM1_R,      0x0000f3d0},

	{ AUD_DEEMPHDENOM2_R,      0x00000000},

	{ AUD_PDF_DDS_CNST_BYTE1,  0x82 },

	{ AUD_PDF_DDS_CNST_BYTE0,  0x16 },

	{ AUD_QAM_MODE,            0x05 },

	{ /* end of list */ },

	};



	static const struct rlist nicam_i[] = {

	{ AUD_PDF_DDS_CNST_BYTE0,  0x12 },

	{ AUD_PHACC_FREQ_8MSB,     0x3a },

	{ AUD_PHACC_FREQ_8LSB,     0x93 },

	{ /* end of list */ },

	};



	dprintk("%s (status: devel), stereo : %d\n",__FUNCTION__,stereo);

	static const struct rlist nicam_default[] = {

	{ AUD_PDF_DDS_CNST_BYTE0,  0x16 },

	{ AUD_PHACC_FREQ_8MSB,     0x34 },

	{ AUD_PHACC_FREQ_8LSB,     0x4c },

	{ /* end of list */ },

	};



	if (!stereo) {

	/* FM Mono */

	set_audio_start(core, SEL_A2);

		set_audio_registers(core, pal_i_fm_mono);

		set_audio_finish(core, EN_DMTRX_SUMDIFF | EN_A2_FORCE_MONO1);

	} else {

	/* Nicam Stereo */

	set_audio_start(core, SEL_NICAM);

		set_audio_registers(core, pal_i_nicam);

		set_audio_finish(core, EN_DMTRX_LR | EN_DMTRX_BYPASS | EN_NICAM_AUTO_STEREO);

	}

	switch (core->tvaudio) {

	case WW_L:

		dprintk("%s SECAM-L NICAM (status: devel)\n",__FUNCTION__);

		set_audio_registers(core, nicam_l);

		break;

	case WW_I:

		dprintk("%s PAL-I NICAM (status: devel)\n",__FUNCTION__);

		set_audio_registers(core, nicam_bgdki_common);

		set_audio_registers(core, nicam_i);

		break;

	default:

		dprintk("%s PAL-BGDK NICAM (status: unknown)\n",__FUNCTION__);

		set_audio_registers(core, nicam_bgdki_common);

		set_audio_registers(core, nicam_default);

		break;

	};



	mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;

	set_audio_finish(core, mode);

}



static void set_audio_standard_A2(struct cx88_core *core, u32 mode)

{

	static const struct rlist a2_common[] = {

	static const struct rlist a2_bgdk_common[] = {

	{AUD_ERRLOGPERIOD_R,            0x00000064},

	{AUD_ERRINTRPTTHSHLD1_R,        0x00000fff},

	{AUD_ERRINTRPTTHSHLD2_R,        0x0000001f},
@@ -589,21 +443,142 @@ static void set_audio_standard_A2(struct cx88_core *core, u32 mode) 
	{AUD_DN2_FREQ,                  0x0000d2e0},

	{ /* end of list */ },

	};

/* unknown, probably NTSC-M */

	static const struct rlist a2_m[] = {

	{AUD_DMD_RA_DDS,                0x002a0425},

	{AUD_C1_UP_THR,                 0x00003c00},

	{AUD_C1_LO_THR,                 0x00003000},

	{AUD_C2_UP_THR,                 0x00006000},

	{AUD_C2_LO_THR,                 0x00003c00},

	{AUD_DEEMPH0_A0,                0x00007a80},

	{AUD_DEEMPH1_A0,                0x00007a80},

	{AUD_DEEMPH0_G0,                0x00001200},

	{AUD_DEEMPH1_G0,                0x00001200},

	{AUD_DN0_FREQ,                  0x0000283b},

	{AUD_DN1_FREQ,                  0x00003418},



	static const struct rlist a1_i[] = {

	{AUD_ERRLOGPERIOD_R,       	0x00000064},

	{AUD_ERRINTRPTTHSHLD1_R,   	0x00000fff},

	{AUD_ERRINTRPTTHSHLD2_R,   	0x0000001f},

	{AUD_ERRINTRPTTHSHLD3_R,   	0x0000000f},

	{AUD_PDF_DDS_CNST_BYTE2,   	0x06},

	{AUD_PDF_DDS_CNST_BYTE1,   	0x82},

	{AUD_PDF_DDS_CNST_BYTE0,   	0x12},

	{AUD_QAM_MODE,             	0x05},

	{AUD_PHACC_FREQ_8MSB,      	0x3a},

	{AUD_PHACC_FREQ_8LSB,      	0x93},

	{AUD_DMD_RA_DDS,           	0x002a4f2f},

	{AUD_PLL_INT,              	0x0000001e},

	{AUD_PLL_DDS,              	0x00000004},

	{AUD_PLL_FRAC,             	0x0000e542},

	{AUD_RATE_ADJ1,            	0x00000100},

	{AUD_RATE_ADJ2,            	0x00000200},

	{AUD_RATE_ADJ3,            	0x00000300},

	{AUD_RATE_ADJ4,            	0x00000400},

	{AUD_RATE_ADJ5,            	0x00000500},

	{AUD_THR_FR,               	0x00000000},

	{AUD_PILOT_BQD_1_K0,       	0x0000755b},

	{AUD_PILOT_BQD_1_K1,       	0x00551340},

	{AUD_PILOT_BQD_1_K2,       	0x006d30be},

	{AUD_PILOT_BQD_1_K3,       	0xffd394af},

	{AUD_PILOT_BQD_1_K4,       	0x00400000},

	{AUD_PILOT_BQD_2_K0,       	0x00040000},

	{AUD_PILOT_BQD_2_K1,       	0x002a4841},

	{AUD_PILOT_BQD_2_K2,       	0x00400000},

	{AUD_PILOT_BQD_2_K3,       	0x00000000},

	{AUD_PILOT_BQD_2_K4,       	0x00000000},

	{AUD_MODE_CHG_TIMER,       	0x00000060},

	{AUD_AFE_12DB_EN,          	0x00000001},

	{AAGC_HYST,                	0x0000000a},

	{AUD_CORDIC_SHIFT_0,       	0x00000007},

	{AUD_CORDIC_SHIFT_1,       	0x00000007},

	{AUD_C1_UP_THR,            	0x00007000},

	{AUD_C1_LO_THR,            	0x00005400},

	{AUD_C2_UP_THR,            	0x00005400},

	{AUD_C2_LO_THR,            	0x00003000},

	{AUD_DCOC_0_SRC,           	0x0000001a},

	{AUD_DCOC0_SHIFT,          	0x00000000},

	{AUD_DCOC_0_SHIFT_IN0,     	0x0000000a},

	{AUD_DCOC_0_SHIFT_IN1,     	0x00000008},

	{AUD_DCOC_PASS_IN,         	0x00000003},

	{AUD_IIR3_0_SEL,           	0x00000021},

	{AUD_DN2_AFC,              	0x00000002},

	{AUD_DCOC_1_SRC,           	0x0000001b},

	{AUD_DCOC1_SHIFT,          	0x00000000},

	{AUD_DCOC_1_SHIFT_IN0,     	0x0000000a},

	{AUD_DCOC_1_SHIFT_IN1,     	0x00000008},

	{AUD_IIR3_1_SEL,           	0x00000023},

	{AUD_DN0_FREQ,             	0x000035a3},

	{AUD_DN2_FREQ,             	0x000029c7},

	{AUD_POLY0_DDS_CONSTANT,        0x000a7540},

	{AUD_CRDC0_SRC_SEL,        	0x00000511},

	{AUD_IIR1_0_SEL,           	0x00000001},

	{AUD_IIR1_1_SEL,           	0x00000000},

	{AUD_IIR3_2_SEL,           	0x00000003},

	{AUD_IIR3_2_SHIFT,         	0x00000000},

	{AUD_IIR3_0_SEL,           	0x00000002},

	{AUD_IIR2_0_SEL,           	0x00000021},

	{AUD_IIR2_0_SHIFT,         	0x00000002},

	{AUD_DEEMPH0_SRC_SEL,      	0x0000000b},

	{AUD_DEEMPH1_SRC_SEL,      	0x0000000b},

	{AUD_POLYPH80SCALEFAC,     	0x00000001},

	{AUD_START_TIMER,          	0x00000000},

	{ /* end of list */ },

	};



	static const struct rlist am_l[] = {

	{AUD_ERRLOGPERIOD_R,      	0x00000064},

	{AUD_ERRINTRPTTHSHLD1_R,  	0x00000FFF},

	{AUD_ERRINTRPTTHSHLD2_R,  	0x0000001F},

	{AUD_ERRINTRPTTHSHLD3_R,  	0x0000000F},

	{AUD_PDF_DDS_CNST_BYTE2,  	0x48},

	{AUD_PDF_DDS_CNST_BYTE1,  	0x3D},

	{AUD_QAM_MODE,            	0x00},

	{AUD_PDF_DDS_CNST_BYTE0,  	0xf5},

	{AUD_PHACC_FREQ_8MSB,     	0x3a},

	{AUD_PHACC_FREQ_8LSB,     	0x4a},

	{AUD_DEEMPHGAIN_R, 	   	0x00006680},

	{AUD_DEEMPHNUMER1_R,      	0x000353DE},

	{AUD_DEEMPHNUMER2_R,      	0x000001B1},

	{AUD_DEEMPHDENOM1_R,      	0x0000F3D0},

	{AUD_DEEMPHDENOM2_R,      	0x00000000},

	{AUD_FM_MODE_ENABLE,      	0x00000007},

	{AUD_POLYPH80SCALEFAC,    	0x00000003},

	{AUD_AFE_12DB_EN,         	0x00000001},

	{AAGC_GAIN,               	0x00000000},

	{AAGC_HYST,               	0x00000018},

	{AAGC_DEF,                	0x00000020},

	{AUD_DN0_FREQ,            	0x00000000},

	{AUD_POLY0_DDS_CONSTANT,  	0x000E4DB2},

	{AUD_DCOC_0_SRC,          	0x00000021},

	{AUD_IIR1_0_SEL,          	0x00000000},

	{AUD_IIR1_0_SHIFT,        	0x00000007},

	{AUD_IIR1_1_SEL,          	0x00000002},

	{AUD_IIR1_1_SHIFT,        	0x00000000},

	{AUD_DCOC_1_SRC,          	0x00000003},

	{AUD_DCOC1_SHIFT,         	0x00000000},

	{AUD_DCOC_PASS_IN,        	0x00000000},

	{AUD_IIR1_2_SEL,          	0x00000023},

	{AUD_IIR1_2_SHIFT,		0x00000000},

	{AUD_IIR1_3_SEL,          	0x00000004},

	{AUD_IIR1_3_SHIFT,        	0x00000007},

	{AUD_IIR1_4_SEL,          	0x00000005},

	{AUD_IIR1_4_SHIFT,        	0x00000007},

	{AUD_IIR3_0_SEL,          	0x00000007},

	{AUD_IIR3_0_SHIFT,        	0x00000000},

	{AUD_DEEMPH0_SRC_SEL,     	0x00000011},

	{AUD_DEEMPH0_SHIFT,       	0x00000000},

	{AUD_DEEMPH0_G0,          	0x00007000},

	{AUD_DEEMPH0_A0,          	0x00000000},

	{AUD_DEEMPH0_B0,          	0x00000000},

	{AUD_DEEMPH0_A1,          	0x00000000},

	{AUD_DEEMPH0_B1,          	0x00000000},

	{AUD_DEEMPH1_SRC_SEL,     	0x00000011},

	{AUD_DEEMPH1_SHIFT,       	0x00000000},

	{AUD_DEEMPH1_G0,          	0x00007000},

	{AUD_DEEMPH1_A0,          	0x00000000},

	{AUD_DEEMPH1_B0,          	0x00000000},

	{AUD_DEEMPH1_A1,          	0x00000000},

	{AUD_DEEMPH1_B1,          	0x00000000},

	{AUD_OUT0_SEL,            	0x0000003F},

	{AUD_OUT1_SEL,            	0x0000003F},

	{AUD_DMD_RA_DDS,          	0x00F5C285},

	{AUD_PLL_INT,             	0x0000001E},

	{AUD_PLL_DDS,             	0x00000000},

	{AUD_PLL_FRAC,            	0x0000E542},

	{AUD_RATE_ADJ1,           	0x00000100},

	{AUD_RATE_ADJ2,           	0x00000200},

	{AUD_RATE_ADJ3,           	0x00000300},

	{AUD_RATE_ADJ4,           	0x00000400},

	{AUD_RATE_ADJ5,           	0x00000500},

	{AUD_RATE_THRES_DMD,      	0x000000C0},

	{/* end of list */ },

	};
@@ -616,32 +591,32 @@ static void set_audio_standard_A2(struct cx88_core *core, u32 mode) 
	{ /* end of list */ },

	};



	static const struct rlist a2_deemph75[] = {

	{AUD_DEEMPH0_G0,                0x00000480},

	{AUD_DEEMPH1_G0,                0x00000480},

	{AUD_DEEMPHGAIN_R,              0x00009000},

	{AUD_DEEMPHNUMER1_R,            0x000353de},

	{AUD_DEEMPHNUMER2_R,            0x000001b1},

		{ /* end of list */ },

	};



	set_audio_start(core, SEL_A2);

	set_audio_registers(core, a2_common);

	switch (core->tvaudio) {

	case WW_A2_BG:

		dprintk("%s PAL-BG A2 (status: known-good)\n",__FUNCTION__);

	case WW_BG:

		dprintk("%s PAL-BG A1/2 (status: known-good)\n",__FUNCTION__);

		set_audio_registers(core, a2_bgdk_common);

		set_audio_registers(core, a2_bg);

		set_audio_registers(core, a2_deemph50);

		break;

	case WW_A2_DK:

		dprintk("%s PAL-DK A2 (status: known-good)\n",__FUNCTION__);

	case WW_DK:

		dprintk("%s PAL-DK A1/2 (status: known-good)\n",__FUNCTION__);

		set_audio_registers(core, a2_bgdk_common);

		set_audio_registers(core, a2_dk);

		set_audio_registers(core, a2_deemph50);

		break;

	case WW_A2_M:

		dprintk("%s NTSC-M A2 (status: unknown)\n",__FUNCTION__);

	set_audio_registers(core, a2_m);

	set_audio_registers(core, a2_deemph75);

	case WW_I:

		dprintk("%s PAL-I A1 (status: known-good)\n",__FUNCTION__);

		set_audio_registers(core, a1_i);

		set_audio_registers(core, a2_deemph50);

		break;

	case WW_L:

		dprintk("%s AM-L (status: devel)\n",__FUNCTION__);

		set_audio_registers(core, am_l);

		break;

	default:

		dprintk("%s Warning: wrong value\n",__FUNCTION__);

		return;

		break;

	};
@@ -728,22 +703,53 @@ static void set_audio_standard_FM(struct cx88_core *core, enum cx88_deemph_type 


/* ----------------------------------------------------------- */



int cx88_detect_nicam(struct cx88_core *core)

{

	int i, j=0;



	dprintk("start nicam autodetect.\n");



	for(i=0; i<6; i++) {

	/* if bit1=1 then nicam is detected */

		j+= ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);



		/* 3x detected: absolutly sure now */

		if(j==3) {

			dprintk("nicam is detected.\n");

			return 1;

		}



		/* wait a little bit for next reading status */

		msleep (10);

	}



	dprintk("nicam is not detected.\n");

	return 0;

}



void cx88_set_tvaudio(struct cx88_core *core)

{

	switch (core->tvaudio) {

	case WW_BTSC:

		set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);

		break;

	case WW_NICAM_BGDKL:

		set_audio_standard_NICAM_L(core,0);

		break;

	case WW_NICAM_I:

		set_audio_standard_PAL_I(core,0);

		break;

	case WW_A2_BG:

	case WW_A2_DK:

	case WW_A2_M:

	case WW_BG:

	case WW_DK:

	case WW_I:

	case WW_L:

		/* prepare all dsp registers */

		set_audio_standard_A2(core, EN_A2_FORCE_MONO1);



		/* set nicam mode - otherwise

		   AUD_NICAM_STATUS2 contains wrong values */

		set_audio_standard_NICAM(core, EN_NICAM_FORCE_MONO1);

		if(0 == cx88_detect_nicam(core)) {

			/* fall back to fm / am mono */

			set_audio_standard_A2(core, EN_A2_FORCE_MONO1);

			core->use_nicam = 0;

			} else {

			core->use_nicam = 1;

			}

		break;

	case WW_EIAJ:

		set_audio_standard_EIAJ(core);
@@ -751,9 +757,6 @@ void cx88_set_tvaudio(struct cx88_core *core) 
	case WW_FM:

		set_audio_standard_FM(core,FM_NO_DEEMPH);

		break;

	case WW_SYSTEM_L_AM:

		set_audio_standard_NICAM_L(core, 1);

		break;

	case WW_NONE:

	default:

		printk("%s/0: unknown tv audio mode [%d]\n",
@@ -766,14 +769,6 @@ void cx88_set_tvaudio(struct cx88_core *core) 
void cx88_newstation(struct cx88_core *core)

{

	core->audiomode_manual = UNSET;



	switch (core->tvaudio) {

	case WW_SYSTEM_L_AM:

		/* try nicam ... */

		core->audiomode_current = V4L2_TUNER_MODE_STEREO;

		set_audio_standard_NICAM_L(core, 1);

		break;

	}

}



void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
@@ -879,58 +874,42 @@ void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual) 
			break;

		}

		break;

	case WW_A2_BG:

	case WW_A2_DK:

	case WW_A2_M:

	case WW_BG:

	case WW_DK:

	case WW_I:

	case WW_L:

		if(1 == core->use_nicam) {

			switch (mode) {

			case V4L2_TUNER_MODE_MONO:

			case V4L2_TUNER_MODE_LANG1:

		set_audio_standard_A2(core, EN_A2_FORCE_MONO1);

						set_audio_standard_NICAM(core, EN_NICAM_FORCE_MONO1);

				break;

			case V4L2_TUNER_MODE_LANG2:

		set_audio_standard_A2(core, EN_A2_FORCE_MONO2);

						set_audio_standard_NICAM(core, EN_NICAM_FORCE_MONO2);

				break;

			case V4L2_TUNER_MODE_STEREO:

		set_audio_standard_A2(core, EN_A2_FORCE_STEREO);

						set_audio_standard_NICAM(core, EN_NICAM_FORCE_STEREO);

				break;

			}

		break;

	case WW_NICAM_BGDKL:

		} else {

			if ( (core->tvaudio == WW_I) || (core->tvaudio == WW_L) ) {

				/* fall back to fm / am mono */

				set_audio_standard_A2(core, EN_A2_FORCE_MONO1);

			} else {

				/* TODO: Add A2 autodection */

				switch (mode) {

				case V4L2_TUNER_MODE_MONO:

			ctl  = EN_NICAM_FORCE_MONO1;

			mask = 0x3f;

			break;

				case V4L2_TUNER_MODE_LANG1:

			ctl  = EN_NICAM_AUTO_MONO2;

			mask = 0x3f;

			break;

		case V4L2_TUNER_MODE_STEREO:

			ctl  = EN_NICAM_FORCE_STEREO | EN_DMTRX_LR;

			mask = 0x93f;

			break;

		}

					set_audio_standard_A2(core, EN_A2_FORCE_MONO1);

					break;

	case WW_SYSTEM_L_AM:

		switch (mode) {

		case V4L2_TUNER_MODE_MONO:

		case V4L2_TUNER_MODE_LANG1:  /* FIXME */

			set_audio_standard_NICAM_L(core, 0);

				case V4L2_TUNER_MODE_LANG2:

					set_audio_standard_A2(core, EN_A2_FORCE_MONO2);

					break;

				case V4L2_TUNER_MODE_STEREO:

			set_audio_standard_NICAM_L(core, 1);

					set_audio_standard_A2(core, EN_A2_FORCE_STEREO);

					break;

				}

		break;

	case WW_NICAM_I:

		switch (mode) {

		case V4L2_TUNER_MODE_MONO:

		case V4L2_TUNER_MODE_LANG1:

			set_audio_standard_PAL_I(core, 0);

			break;

		case V4L2_TUNER_MODE_STEREO:

			set_audio_standard_PAL_I(core, 1);

			break;

			}

		}

		break;

	case WW_FM:

drivers/media/video/cx88/cx88.h

+9 −10
Original line number Diff line number Diff line
@@ -288,6 +288,7 @@ struct cx88_core { 
	u32                        audiomode_current;

	u32                        input;

	u32                        astat;

	u32			   use_nicam;



	/* IR remote control state */

	struct cx88_IR             *ir;
@@ -527,22 +528,20 @@ extern void cx88_card_setup(struct cx88_core *core); 


#define WW_NONE		 1

#define WW_BTSC		 2

#define WW_NICAM_I	 3

#define WW_NICAM_BGDKL	 4

#define WW_A1		 5

#define WW_A2_BG	 6

#define WW_A2_DK	 7

#define WW_A2_M		 8

#define WW_EIAJ		 9

#define WW_SYSTEM_L_AM	10

#define WW_I2SPT	11

#define WW_FM		12

#define WW_BG		 3

#define WW_DK		 4

#define WW_I		 5

#define WW_L		 6

#define WW_EIAJ		 7

#define WW_I2SPT	 8

#define WW_FM		 9



void cx88_set_tvaudio(struct cx88_core *core);

void cx88_newstation(struct cx88_core *core);

void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t);

void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual);

int cx88_audio_thread(void *data);

int cx88_detect_nicam(struct cx88_core *core);



/* ----------------------------------------------------------- */

/* cx88-input.c                                                */