Commit b279b54b authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Geert Uytterhoeven
Browse files

pinctrl: renesas: r8a779g0: Remove unused MOD_SELx definitions 



Current R-Car V4H PFC code has many MOD_SELx definitions with all 0.
But these have no meaning.  This patch removes them.

Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/875ykhtxym.wl-kuninori.morimoto.gx@renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 1204bc46

drivers/pinctrl/renesas/pfc-r8a779g0.c

+18 −54
Original line number Diff line number Diff line
@@ -566,85 +566,49 @@ FM(IP0SR8_31_28) IP0SR8_31_28 
/* MOD_SEL4 */			/* 0 */				/* 1 */

#define MOD_SEL4_19		FM(SEL_TSN0_TD2_0)		FM(SEL_TSN0_TD2_1)

#define MOD_SEL4_18		FM(SEL_TSN0_TD3_0)		FM(SEL_TSN0_TD3_1)

#define MOD_SEL4_17		F_(0, 0)			F_(0, 0)

#define MOD_SEL4_16		F_(0, 0)			F_(0, 0)

#define MOD_SEL4_15		FM(SEL_TSN0_TD0_0)		FM(SEL_TSN0_TD0_1)

#define MOD_SEL4_14		FM(SEL_TSN0_TD1_0)		FM(SEL_TSN0_TD1_1)

#define MOD_SEL4_13		F_(0, 0)			F_(0, 0)

#define MOD_SEL4_12		FM(SEL_TSN0_TXC_0)		FM(SEL_TSN0_TXC_1)

#define MOD_SEL4_11		F_(0, 0)			F_(0, 0)

#define MOD_SEL4_10		F_(0, 0)			F_(0, 0)

#define MOD_SEL4_9		FM(SEL_TSN0_TX_CTL_0)		FM(SEL_TSN0_TX_CTL_1)

#define MOD_SEL4_8		FM(SEL_TSN0_AVTP_PPS0_0)	FM(SEL_TSN0_AVTP_PPS0_1)

#define MOD_SEL4_7		F_(0, 0)			F_(0, 0)

#define MOD_SEL4_6		F_(0, 0)			F_(0, 0)

#define MOD_SEL4_5		FM(SEL_TSN0_AVTP_MATCH_0)	FM(SEL_TSN0_AVTP_MATCH_1)

#define MOD_SEL4_4		F_(0, 0)			F_(0, 0)

#define MOD_SEL4_3		F_(0, 0)			F_(0, 0)

#define MOD_SEL4_2		FM(SEL_TSN0_AVTP_PPS1_0)	FM(SEL_TSN0_AVTP_PPS1_1)

#define MOD_SEL4_1		FM(SEL_TSN0_MDC_0)		FM(SEL_TSN0_MDC_1)

#define MOD_SEL4_0		F_(0, 0)			F_(0, 0)



/* MOD_SEL5 */			/* 0 */				/* 1 */

#define MOD_SEL5_19		FM(SEL_AVB2_TX_CTL_0)		FM(SEL_AVB2_TX_CTL_1)

#define MOD_SEL5_18		F_(0, 0)			F_(0, 0)

#define MOD_SEL5_17		F_(0, 0)			F_(0, 0)

#define MOD_SEL5_16		FM(SEL_AVB2_TXC_0)		FM(SEL_AVB2_TXC_1)

#define MOD_SEL5_15		FM(SEL_AVB2_TD0_0)		FM(SEL_AVB2_TD0_1)

#define MOD_SEL5_14		F_(0, 0)			F_(0, 0)

#define MOD_SEL5_13		F_(0, 0)			F_(0, 0)

#define MOD_SEL5_12		FM(SEL_AVB2_TD1_0)		FM(SEL_AVB2_TD1_1)

#define MOD_SEL5_11		FM(SEL_AVB2_TD2_0)		FM(SEL_AVB2_TD2_1)

#define MOD_SEL5_10		F_(0, 0)			F_(0, 0)

#define MOD_SEL5_9		F_(0, 0)			F_(0, 0)

#define MOD_SEL5_8		FM(SEL_AVB2_TD3_0)		FM(SEL_AVB2_TD3_1)

#define MOD_SEL5_7		F_(0, 0)			F_(0, 0)

#define MOD_SEL5_6		FM(SEL_AVB2_MDC_0)		FM(SEL_AVB2_MDC_1)

#define MOD_SEL5_5		FM(SEL_AVB2_MAGIC_0)		FM(SEL_AVB2_MAGIC_1)

#define MOD_SEL5_4		F_(0, 0)			F_(0, 0)

#define MOD_SEL5_3		F_(0, 0)			F_(0, 0)

#define MOD_SEL5_2		FM(SEL_AVB2_AVTP_MATCH_0)	FM(SEL_AVB2_AVTP_MATCH_1)

#define MOD_SEL5_1		F_(0, 0)			F_(0, 0)

#define MOD_SEL5_0		FM(SEL_AVB2_AVTP_PPS_0)		FM(SEL_AVB2_AVTP_PPS_1)



/* MOD_SEL6 */			/* 0 */				/* 1 */

#define MOD_SEL6_18		FM(SEL_AVB1_TD3_0)		FM(SEL_AVB1_TD3_1)

#define MOD_SEL6_17		F_(0, 0)			F_(0, 0)

#define MOD_SEL6_16		FM(SEL_AVB1_TD2_0)		FM(SEL_AVB1_TD2_1)

#define MOD_SEL6_15		F_(0, 0)			F_(0, 0)

#define MOD_SEL6_14		F_(0, 0)			F_(0, 0)

#define MOD_SEL6_13		FM(SEL_AVB1_TD0_0)		FM(SEL_AVB1_TD0_1)

#define MOD_SEL6_12		FM(SEL_AVB1_TD1_0)		FM(SEL_AVB1_TD1_1)

#define MOD_SEL6_11		F_(0, 0)			F_(0, 0)

#define MOD_SEL6_10		FM(SEL_AVB1_AVTP_PPS_0)		FM(SEL_AVB1_AVTP_PPS_1)

#define MOD_SEL6_9		F_(0, 0)			F_(0, 0)

#define MOD_SEL6_8		F_(0, 0)			F_(0, 0)

#define MOD_SEL6_7		FM(SEL_AVB1_TX_CTL_0)		FM(SEL_AVB1_TX_CTL_1)

#define MOD_SEL6_6		FM(SEL_AVB1_TXC_0)		FM(SEL_AVB1_TXC_1)

#define MOD_SEL6_5		FM(SEL_AVB1_AVTP_MATCH_0)	FM(SEL_AVB1_AVTP_MATCH_1)

#define MOD_SEL6_4		F_(0, 0)			F_(0, 0)

#define MOD_SEL6_3		F_(0, 0)			F_(0, 0)

#define MOD_SEL6_2		FM(SEL_AVB1_MDC_0)		FM(SEL_AVB1_MDC_1)

#define MOD_SEL6_1		FM(SEL_AVB1_MAGIC_0)		FM(SEL_AVB1_MAGIC_1)

#define MOD_SEL6_0		F_(0, 0)			F_(0, 0)



/* MOD_SEL7 */			/* 0 */				/* 1 */

#define MOD_SEL7_16		FM(SEL_AVB0_TX_CTL_0)		FM(SEL_AVB0_TX_CTL_1)

#define MOD_SEL7_15		FM(SEL_AVB0_TXC_0)		FM(SEL_AVB0_TXC_1)

#define MOD_SEL7_14		F_(0, 0)			F_(0, 0)

#define MOD_SEL7_13		FM(SEL_AVB0_MDC_0)		FM(SEL_AVB0_MDC_1)

#define MOD_SEL7_12		F_(0, 0)			F_(0, 0)

#define MOD_SEL7_11		FM(SEL_AVB0_TD0_0)		FM(SEL_AVB0_TD0_1)

#define MOD_SEL7_10		FM(SEL_AVB0_MAGIC_0)		FM(SEL_AVB0_MAGIC_1)

#define MOD_SEL7_9		F_(0, 0)			F_(0, 0)

#define MOD_SEL7_8		F_(0, 0)			F_(0, 0)

#define MOD_SEL7_7		FM(SEL_AVB0_TD1_0)		FM(SEL_AVB0_TD1_1)

#define MOD_SEL7_6		FM(SEL_AVB0_TD2_0)		FM(SEL_AVB0_TD2_1)

#define MOD_SEL7_5		F_(0, 0)			F_(0, 0)

#define MOD_SEL7_4		F_(0, 0)			F_(0, 0)

#define MOD_SEL7_3		FM(SEL_AVB0_TD3_0)		FM(SEL_AVB0_TD3_1)

#define MOD_SEL7_2		FM(SEL_AVB0_AVTP_MATCH_0)	FM(SEL_AVB0_AVTP_MATCH_1)

#define MOD_SEL7_1		F_(0, 0)			F_(0, 0)

#define MOD_SEL7_0		FM(SEL_AVB0_AVTP_PPS_0)		FM(SEL_AVB0_AVTP_PPS_1)



/* MOD_SEL8 */			/* 0 */				/* 1 */
@@ -664,25 +628,25 @@ FM(IP0SR8_31_28) IP0SR8_31_28 
#define PINMUX_MOD_SELS \

\

MOD_SEL4_19		MOD_SEL5_19										\

MOD_SEL4_18		MOD_SEL5_18		MOD_SEL6_18							\

MOD_SEL4_17		MOD_SEL5_17		MOD_SEL6_17							\

MOD_SEL4_16		MOD_SEL5_16		MOD_SEL6_16		MOD_SEL7_16				\

MOD_SEL4_15		MOD_SEL5_15		MOD_SEL6_15		MOD_SEL7_15				\

MOD_SEL4_14		MOD_SEL5_14		MOD_SEL6_14		MOD_SEL7_14				\

MOD_SEL4_13		MOD_SEL5_13		MOD_SEL6_13		MOD_SEL7_13				\

MOD_SEL4_12		MOD_SEL5_12		MOD_SEL6_12		MOD_SEL7_12				\

MOD_SEL4_11		MOD_SEL5_11		MOD_SEL6_11		MOD_SEL7_11		MOD_SEL8_11	\

MOD_SEL4_10		MOD_SEL5_10		MOD_SEL6_10		MOD_SEL7_10		MOD_SEL8_10	\

MOD_SEL4_9		MOD_SEL5_9		MOD_SEL6_9		MOD_SEL7_9		MOD_SEL8_9	\

MOD_SEL4_8		MOD_SEL5_8		MOD_SEL6_8		MOD_SEL7_8		MOD_SEL8_8	\

MOD_SEL4_7		MOD_SEL5_7		MOD_SEL6_7		MOD_SEL7_7		MOD_SEL8_7	\

MOD_SEL4_6		MOD_SEL5_6		MOD_SEL6_6		MOD_SEL7_6		MOD_SEL8_6	\

MOD_SEL4_5		MOD_SEL5_5		MOD_SEL6_5		MOD_SEL7_5		MOD_SEL8_5	\

MOD_SEL4_4		MOD_SEL5_4		MOD_SEL6_4		MOD_SEL7_4		MOD_SEL8_4	\

MOD_SEL4_3		MOD_SEL5_3		MOD_SEL6_3		MOD_SEL7_3		MOD_SEL8_3	\

MOD_SEL4_18					MOD_SEL6_18							\

														\

			MOD_SEL5_16		MOD_SEL6_16		MOD_SEL7_16				\

MOD_SEL4_15		MOD_SEL5_15					MOD_SEL7_15				\

MOD_SEL4_14													\

						MOD_SEL6_13		MOD_SEL7_13				\

MOD_SEL4_12		MOD_SEL5_12		MOD_SEL6_12							\

			MOD_SEL5_11					MOD_SEL7_11		MOD_SEL8_11	\

						MOD_SEL6_10		MOD_SEL7_10		MOD_SEL8_10	\

MOD_SEL4_9											MOD_SEL8_9	\

MOD_SEL4_8		MOD_SEL5_8								MOD_SEL8_8	\

						MOD_SEL6_7		MOD_SEL7_7		MOD_SEL8_7	\

			MOD_SEL5_6		MOD_SEL6_6		MOD_SEL7_6		MOD_SEL8_6	\

MOD_SEL4_5		MOD_SEL5_5		MOD_SEL6_5					MOD_SEL8_5	\

												MOD_SEL8_4	\

									MOD_SEL7_3		MOD_SEL8_3	\

MOD_SEL4_2		MOD_SEL5_2		MOD_SEL6_2		MOD_SEL7_2		MOD_SEL8_2	\

MOD_SEL4_1		MOD_SEL5_1		MOD_SEL6_1		MOD_SEL7_1		MOD_SEL8_1	\

MOD_SEL4_0		MOD_SEL5_0		MOD_SEL6_0		MOD_SEL7_0		MOD_SEL8_0

MOD_SEL4_1					MOD_SEL6_1					MOD_SEL8_1	\

			MOD_SEL5_0					MOD_SEL7_0		MOD_SEL8_0



enum {

	PINMUX_RESERVED = 0,