Commit b475bf0e authored by Sandeep Maheswaram's avatar Sandeep Maheswaram Committed by Vinod Koul
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phy: qcom-snps: Correct the FSEL_MASK 



The FSEL_MASK which selects the refclock is defined incorrectly.
It should be [4:6] not [5:7]. Due to this incorrect definition, the BIT(7)
in USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0 is reset which keeps PHY analog
blocks ON during suspend.
Fix this issue by correctly defining the FSEL_MASK.

Fixes: 51e8114f ("phy: qcom-snps: Add SNPS USB PHY driver for QCOM based SOCs")
Signed-off-by: default avatarSandeep Maheswaram <quic_c_sanm@quicinc.com>
Link: https://lore.kernel.org/r/1635135575-5668-1-git-send-email-quic_c_sanm@quicinc.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 21b89120

drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c

+1 −1
Original line number Diff line number Diff line
@@ -33,7 +33,7 @@ 


#define USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0	(0x54)

#define RETENABLEN				BIT(3)

#define FSEL_MASK				GENMASK(7, 5)

#define FSEL_MASK				GENMASK(6, 4)

#define FSEL_DEFAULT				(0x3 << 4)



#define USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON1	(0x58)