Commit b4ced803 authored by Nicholas Piggin's avatar Nicholas Piggin Committed by Michael Ellerman
Browse files

powerpc/fsl_booke/32: CacheLockingException remove args



Like other interrupt handler conversions, switch to getting registers
from the pt_regs argument.

Signed-off-by: default avatarNicholas Piggin <npiggin@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210130130852.2952424-8-npiggin@gmail.com
parent a01a3f2d
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+3 −3
Original line number Diff line number Diff line
@@ -364,12 +364,12 @@ interrupt_base:
	/* Data Storage Interrupt */
	START_EXCEPTION(DataStorage)
	NORMAL_EXCEPTION_PROLOG(DATA_STORAGE)
	mfspr	r5,SPRN_ESR		/* Grab the ESR, save it, pass arg3 */
	mfspr	r5,SPRN_ESR		/* Grab the ESR, save it */
	stw	r5,_ESR(r11)
	mfspr	r4,SPRN_DEAR		/* Grab the DEAR, save it, pass arg2 */
	mfspr	r4,SPRN_DEAR		/* Grab the DEAR, save it */
	stw	r4, _DEAR(r11)
	andis.	r10,r5,(ESR_ILK|ESR_DLK)@h
	bne	1f
	stw	r4, _DEAR(r11)
	EXC_XFER_LITE(0x0300, handle_page_fault)
1:
	addi	r3,r1,STACK_FRAME_OVERHEAD
+3 −2
Original line number Diff line number Diff line
@@ -2062,9 +2062,10 @@ void altivec_assist_exception(struct pt_regs *regs)
#endif /* CONFIG_ALTIVEC */

#ifdef CONFIG_FSL_BOOKE
void CacheLockingException(struct pt_regs *regs, unsigned long address,
			   unsigned long error_code)
void CacheLockingException(struct pt_regs *regs)
{
	unsigned long error_code = regs->dsisr;

	/* We treat cache locking instructions from the user
	 * as priv ops, in the future we could try to do
	 * something smarter