arm64: tegra: Fix SOR powergate clocks and reset

Tegra210 device tree lists CSI clock and reset under SOR powergate
node.

But Tegra210 has CSICIL in SOR partition and CSI in VENC partition.

So, this patch includes fix for SOR powergate node.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>