Loading arch/arm/Kconfig +1 −1 Original line number Diff line number Diff line Loading @@ -727,6 +727,7 @@ config ARCH_S3C64XX select ARM_VIC select CLKDEV_LOOKUP select CLKSRC_SAMSUNG_PWM select COMMON_CLK select CPU_V6 select GENERIC_CLOCKEVENTS select GPIO_SAMSUNG Loading @@ -740,7 +741,6 @@ config ARCH_S3C64XX select S3C_DEV_NAND select S3C_GPIO_TRACK select SAMSUNG_ATAGS select SAMSUNG_CLKSRC select SAMSUNG_GPIOLIB_4BIT select SAMSUNG_WDT_RESET select USB_ARCH_HAS_OHCI Loading arch/arm/mach-s3c64xx/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -12,7 +12,7 @@ obj- := # Core obj-y += common.o clock.o obj-y += common.o # Core support Loading arch/arm/mach-s3c64xx/common.c +17 −4 Original line number Diff line number Diff line Loading @@ -17,6 +17,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/module.h> #include <linux/clk-provider.h> #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/serial_core.h> Loading @@ -38,7 +39,6 @@ #include <mach/regs-gpio.h> #include <plat/cpu.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/pm.h> #include <plat/gpio-cfg.h> Loading @@ -50,6 +50,19 @@ #include "common.h" /* External clock frequency */ static unsigned long xtal_f = 12000000, xusbxti_f = 48000000; void __init s3c64xx_set_xtal_freq(unsigned long freq) { xtal_f = freq; } void __init s3c64xx_set_xusbxti_freq(unsigned long freq) { xusbxti_f = freq; } /* uart registration process */ static void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) Loading @@ -67,7 +80,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idcode = S3C6400_CPU_ID, .idmask = S3C64XX_CPU_MASK, .map_io = s3c6400_map_io, .init_clocks = s3c6400_init_clocks, .init_uarts = s3c64xx_init_uarts, .init = s3c6400_init, .name = name_s3c6400, Loading @@ -75,7 +87,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idcode = S3C6410_CPU_ID, .idmask = S3C64XX_CPU_MASK, .map_io = s3c6410_map_io, .init_clocks = s3c6410_init_clocks, .init_uarts = s3c64xx_init_uarts, .init = s3c6410_init, .name = name_s3c6410, Loading Loading @@ -213,8 +224,10 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) { /* * FIXME: there is no better place to put this at the moment * (samsung_wdt_reset_init needs clocks) * (s3c64xx_clk_init needs ioremap and must happen before init_time * samsung_wdt_reset_init needs clocks) */ s3c64xx_clk_init(NULL, xtal_f, xusbxti_f, soc_is_s3c6400(), S3C_VA_SYS); samsung_wdt_reset_init(S3C_VA_WATCHDOG); printk(KERN_DEBUG "%s: initialising interrupts\n", __func__); Loading arch/arm/mach-s3c64xx/common.h +5 −5 Original line number Diff line number Diff line Loading @@ -22,18 +22,19 @@ void s3c64xx_init_irq(u32 vic0, u32 vic1); void s3c64xx_init_io(struct map_desc *mach_desc, int size); void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit); void s3c64xx_setup_clocks(void); void s3c64xx_restart(enum reboot_mode mode, const char *cmd); void s3c64xx_init_late(void); void s3c64xx_clk_init(struct device_node *np, unsigned long xtal_f, unsigned long xusbxti_f, bool is_s3c6400, void __iomem *reg_base); void s3c64xx_set_xtal_freq(unsigned long freq); void s3c64xx_set_xusbxti_freq(unsigned long freq); #ifdef CONFIG_CPU_S3C6400 extern int s3c6400_init(void); extern void s3c6400_init_irq(void); extern void s3c6400_map_io(void); extern void s3c6400_init_clocks(int xtal); #else #define s3c6400_init_clocks NULL Loading @@ -46,7 +47,6 @@ extern void s3c6400_init_clocks(int xtal); extern int s3c6410_init(void); extern void s3c6410_init_irq(void); extern void s3c6410_map_io(void); extern void s3c6410_init_clocks(int xtal); #else #define s3c6410_init_clocks NULL Loading arch/arm/mach-s3c64xx/mach-anw6410.c +1 −1 Original line number Diff line number Diff line Loading @@ -207,7 +207,7 @@ static struct platform_device *anw6410_devices[] __initdata = { static void __init anw6410_map_io(void) { s3c64xx_init_io(anw6410_iodesc, ARRAY_SIZE(anw6410_iodesc)); s3c24xx_init_clocks(12000000); s3c64xx_set_xtal_freq(12000000); s3c24xx_init_uarts(anw6410_uartcfgs, ARRAY_SIZE(anw6410_uartcfgs)); samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); Loading Loading
arch/arm/Kconfig +1 −1 Original line number Diff line number Diff line Loading @@ -727,6 +727,7 @@ config ARCH_S3C64XX select ARM_VIC select CLKDEV_LOOKUP select CLKSRC_SAMSUNG_PWM select COMMON_CLK select CPU_V6 select GENERIC_CLOCKEVENTS select GPIO_SAMSUNG Loading @@ -740,7 +741,6 @@ config ARCH_S3C64XX select S3C_DEV_NAND select S3C_GPIO_TRACK select SAMSUNG_ATAGS select SAMSUNG_CLKSRC select SAMSUNG_GPIOLIB_4BIT select SAMSUNG_WDT_RESET select USB_ARCH_HAS_OHCI Loading
arch/arm/mach-s3c64xx/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -12,7 +12,7 @@ obj- := # Core obj-y += common.o clock.o obj-y += common.o # Core support Loading
arch/arm/mach-s3c64xx/common.c +17 −4 Original line number Diff line number Diff line Loading @@ -17,6 +17,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/module.h> #include <linux/clk-provider.h> #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/serial_core.h> Loading @@ -38,7 +39,6 @@ #include <mach/regs-gpio.h> #include <plat/cpu.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/pm.h> #include <plat/gpio-cfg.h> Loading @@ -50,6 +50,19 @@ #include "common.h" /* External clock frequency */ static unsigned long xtal_f = 12000000, xusbxti_f = 48000000; void __init s3c64xx_set_xtal_freq(unsigned long freq) { xtal_f = freq; } void __init s3c64xx_set_xusbxti_freq(unsigned long freq) { xusbxti_f = freq; } /* uart registration process */ static void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) Loading @@ -67,7 +80,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idcode = S3C6400_CPU_ID, .idmask = S3C64XX_CPU_MASK, .map_io = s3c6400_map_io, .init_clocks = s3c6400_init_clocks, .init_uarts = s3c64xx_init_uarts, .init = s3c6400_init, .name = name_s3c6400, Loading @@ -75,7 +87,6 @@ static struct cpu_table cpu_ids[] __initdata = { .idcode = S3C6410_CPU_ID, .idmask = S3C64XX_CPU_MASK, .map_io = s3c6410_map_io, .init_clocks = s3c6410_init_clocks, .init_uarts = s3c64xx_init_uarts, .init = s3c6410_init, .name = name_s3c6410, Loading Loading @@ -213,8 +224,10 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) { /* * FIXME: there is no better place to put this at the moment * (samsung_wdt_reset_init needs clocks) * (s3c64xx_clk_init needs ioremap and must happen before init_time * samsung_wdt_reset_init needs clocks) */ s3c64xx_clk_init(NULL, xtal_f, xusbxti_f, soc_is_s3c6400(), S3C_VA_SYS); samsung_wdt_reset_init(S3C_VA_WATCHDOG); printk(KERN_DEBUG "%s: initialising interrupts\n", __func__); Loading
arch/arm/mach-s3c64xx/common.h +5 −5 Original line number Diff line number Diff line Loading @@ -22,18 +22,19 @@ void s3c64xx_init_irq(u32 vic0, u32 vic1); void s3c64xx_init_io(struct map_desc *mach_desc, int size); void s3c64xx_register_clocks(unsigned long xtal, unsigned armclk_limit); void s3c64xx_setup_clocks(void); void s3c64xx_restart(enum reboot_mode mode, const char *cmd); void s3c64xx_init_late(void); void s3c64xx_clk_init(struct device_node *np, unsigned long xtal_f, unsigned long xusbxti_f, bool is_s3c6400, void __iomem *reg_base); void s3c64xx_set_xtal_freq(unsigned long freq); void s3c64xx_set_xusbxti_freq(unsigned long freq); #ifdef CONFIG_CPU_S3C6400 extern int s3c6400_init(void); extern void s3c6400_init_irq(void); extern void s3c6400_map_io(void); extern void s3c6400_init_clocks(int xtal); #else #define s3c6400_init_clocks NULL Loading @@ -46,7 +47,6 @@ extern void s3c6400_init_clocks(int xtal); extern int s3c6410_init(void); extern void s3c6410_init_irq(void); extern void s3c6410_map_io(void); extern void s3c6410_init_clocks(int xtal); #else #define s3c6410_init_clocks NULL Loading
arch/arm/mach-s3c64xx/mach-anw6410.c +1 −1 Original line number Diff line number Diff line Loading @@ -207,7 +207,7 @@ static struct platform_device *anw6410_devices[] __initdata = { static void __init anw6410_map_io(void) { s3c64xx_init_io(anw6410_iodesc, ARRAY_SIZE(anw6410_iodesc)); s3c24xx_init_clocks(12000000); s3c64xx_set_xtal_freq(12000000); s3c24xx_init_uarts(anw6410_uartcfgs, ARRAY_SIZE(anw6410_uartcfgs)); samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); Loading