Commit b7ff3a44 authored by Dinh Nguyen's avatar Dinh Nguyen
Browse files

arm64: dts: agilex: fix phy interface bit shift for gmac1 and gmac2 



The shift for the phy_intf_sel bit in the system manager for gmac1 and
gmac2 should be 0.

Fixes: 2f804ba7 ("arm64: dts: agilex: Add SysMgr to Ethernet nodes")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent 1048ba83

arch/arm64/boot/dts/intel/socfpga_agilex.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -166,7 +166,7 @@ gmac1: ethernet@ff802000 { 
			rx-fifo-depth = <16384>;

			snps,multicast-filter-bins = <256>;

			iommus = <&smmu 2>;

			altr,sysmgr-syscon = <&sysmgr 0x48 8>;

			altr,sysmgr-syscon = <&sysmgr 0x48 0>;

			clocks = <&clkmgr AGILEX_EMAC1_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>;

			clock-names = "stmmaceth", "ptp_ref";

			status = "disabled";
@@ -184,7 +184,7 @@ gmac2: ethernet@ff804000 { 
			rx-fifo-depth = <16384>;

			snps,multicast-filter-bins = <256>;

			iommus = <&smmu 3>;

			altr,sysmgr-syscon = <&sysmgr 0x4c 16>;

			altr,sysmgr-syscon = <&sysmgr 0x4c 0>;

			clocks = <&clkmgr AGILEX_EMAC2_CLK>, <&clkmgr AGILEX_EMAC_PTP_CLK>;

			clock-names = "stmmaceth", "ptp_ref";

			status = "disabled";