Commit bcd9a5f8 authored by Candice Li's avatar Candice Li Committed by Alex Deucher
Browse files

drm/amdgpu: Update total channel number for umc v8_10 



Update total channel number for umc v8_10.

Signed-off-by: default avatarCandice Li <candice.li@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4506f0bc

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

+1 −0
Original line number Diff line number Diff line
@@ -1515,6 +1515,7 @@ static int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev) 
				mall_size += mall_size_per_umc;

		}

		adev->gmc.mall_size = mall_size;

		adev->gmc.m_half_use = half_use;

		break;

	default:

		dev_err(adev->dev,

drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h

+2 −0
Original line number Diff line number Diff line
@@ -301,6 +301,8 @@ struct amdgpu_gmc { 


	/* MALL size */

	u64 mall_size;

	uint32_t m_half_use;



	/* number of UMC instances */

	int num_umc;

	/* mode2 save restore */

drivers/gpu/drm/amd/amdgpu/umc_v8_10.h

+2 −1
Original line number Diff line number Diff line
@@ -33,7 +33,8 @@ 


/* Total channel instances for all available umc nodes */

#define UMC_V8_10_TOTAL_CHANNEL_NUM(adev) \

	(UMC_V8_10_CHANNEL_INSTANCE_NUM * UMC_V8_10_UMC_INSTANCE_NUM * (adev)->gmc.num_umc)

	(UMC_V8_10_CHANNEL_INSTANCE_NUM * UMC_V8_10_UMC_INSTANCE_NUM * \

	(adev)->gmc.num_umc - hweight32((adev)->gmc.m_half_use) * 2)



/* UMC regiser per channel offset */

#define UMC_V8_10_PER_CHANNEL_OFFSET	0x400