Commit bd4d5488 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'ti-k3-soc-for-v5.6' of... 

Merge tag 'ti-k3-soc-for-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/dt

Texas Instruments K3 SoC family changes for 5.6

- Add missing power domains for smmu for J721e
- Add I2C, ADC, OSPI and UFS nodes for J721e
- Add OSPI and MCU syscon nodes for am65x
- Add IRQ line for GPIO expander on am65x

* tag 'ti-k3-soc-for-v5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
  arm64: dts: ti: k3-j721e-main: Add missing power-domains for smmu
  arm64: dts: ti: k3-am65-mcu: add system control module node
  arm64: dts: k3-am654-base-board: Add IRQ line for GPIO expander
  arm64: dts: ti: k3-am65: Add OSPI DT node
  arm64: dts: ti: k3-j721e: Add DT nodes for few peripherials

Link: https://lore.kernel.org/r/c5b74bfc-f2f0-1b72-4a3c-4c1d478a023a@ti.com


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents b252fd42 3f03a58b

arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi

+46 −0
Original line number Diff line number Diff line
@@ -6,6 +6,14 @@ 
 */



&cbass_mcu {

	mcu_conf: scm_conf@40f00000 {

		compatible = "syscon", "simple-mfd";

		reg = <0x0 0x40f00000 0x0 0x20000>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x0 0x0 0x40f00000 0x20000>;

	};



	mcu_uart0: serial@40a00000 {

		compatible = "ti,am654-uart";

			reg = <0x00 0x40a00000 0x00 0x100>;
@@ -95,4 +103,42 @@ adc { 
			compatible = "ti,am654-adc", "ti,am3359-adc";

		};

	};



	fss: fss@47000000 {

		compatible = "simple-bus";

		#address-cells = <2>;

		#size-cells = <2>;

		ranges;



		ospi0: spi@47040000 {

			compatible = "ti,am654-ospi", "cdns,qspi-nor";

			reg = <0x0 0x47040000 0x0 0x100>,

				<0x5 0x00000000 0x1 0x0000000>;

			interrupts = <GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH>;

			cdns,fifo-depth = <256>;

			cdns,fifo-width = <4>;

			cdns,trigger-address = <0x0>;

			clocks = <&k3_clks 248 0>;

			assigned-clocks = <&k3_clks 248 0>;

			assigned-clock-parents = <&k3_clks 248 2>;

			assigned-clock-rates = <166666666>;

			power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;

			#address-cells = <1>;

			#size-cells = <0>;

		};



		ospi1: spi@47050000 {

			compatible = "ti,am654-ospi", "cdns,qspi-nor";

			reg = <0x0 0x47050000 0x0 0x100>,

				<0x7 0x00000000 0x1 0x00000000>;

			interrupts = <GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH>;

			cdns,fifo-depth = <256>;

			cdns,fifo-width = <4>;

			cdns,trigger-address = <0x0>;

			clocks = <&k3_clks 249 6>;

			power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;

			#address-cells = <1>;

			#size-cells = <0>;

		};

	};

};

arch/arm64/boot/dts/ti/k3-am65.dtsi

+11 −2
Original line number Diff line number Diff line
@@ -74,13 +74,18 @@ cbass_main: interconnect@100000 { 
			 /* MCUSS Range */

			 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,

			 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,

			 <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */

			 <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>,

			 <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>,

			 <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>,

			 <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>,

			 <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>,

			 <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>,

			 <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>;

			 <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>,

			 <0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>,

			 <0x00 0x70000000 0x00 0x70000000 0x00 0x200000>,

			 <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>,

			 <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>;



		cbass_mcu: interconnect@28380000 {

			compatible = "simple-bus";
@@ -88,13 +93,17 @@ cbass_mcu: interconnect@28380000 { 
			#size-cells = <2>;

			ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, /* MCU NAVSS*/

				 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>, /* First peripheral window */

				 <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */

				 <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */

				 <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, /* MCU R5F Core1 */

				 <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>, /* MCU SRAM */

				 <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, /* WKUP */

				 <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, /* MMRs, remaining NAVSS */

				 <0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, /* CPSW */

				 <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>; /* OSPI space 1 */

				 <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, /* OSPI space 1 */

				 <0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>, /*  FSS OSPI0 data region 1 */

				 <0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>, /* FSS OSPI0 data region 3*/

				 <0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>; /* FSS OSPI1 data region 3*/



			cbass_wakeup: interconnect@42040000 {

				compatible = "simple-bus";

arch/arm64/boot/dts/ti/k3-am654-base-board.dts

+49 −0
Original line number Diff line number Diff line
@@ -69,6 +69,29 @@ AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */ 
			AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */

		>;

	};



	mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default {

		pinctrl-single,pins = <

			AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */

			AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0)	 /* (U2) MCU_OSPI0_DQS */

			AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0)  /* (U4) MCU_OSPI0_D0 */

			AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0)  /* (U5) MCU_OSPI0_D1 */

			AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0)  /* (T2) MCU_OSPI0_D2 */

			AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0)  /* (T3) MCU_OSPI0_D3 */

			AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0)  /* (T4) MCU_OSPI0_D4 */

			AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0)  /* (T5) MCU_OSPI0_D5 */

			AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0)  /* (R2) MCU_OSPI0_D6 */

			AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0)  /* (R3) MCU_OSPI0_D7 */

			AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */

		>;

	};



	wkup_pca554_default: wkup_pca554_default {

		pinctrl-single,pins = <

			AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */



		>;

	};

};



&main_pmx0 {
@@ -164,6 +187,12 @@ pca9554: gpio@39 { 
		reg = <0x39>;

		gpio-controller;

		#gpio-cells = <2>;

		pinctrl-names = "default";

		pinctrl-0 = <&wkup_pca554_default>;

		interrupt-parent = <&wkup_gpio0>;

		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};

};
@@ -339,3 +368,23 @@ &mailbox0_cluster10 { 
&mailbox0_cluster11 {

	status = "disabled";

};



&ospi0 {

	pinctrl-names = "default";

	pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;



	flash@0{

		compatible = "jedec,spi-nor";

		reg = <0x0>;

		spi-tx-bus-width = <1>;

		spi-rx-bus-width = <8>;

		spi-max-frequency = <40000000>;

		cdns,tshsl-ns = <60>;

		cdns,tsd2d-ns = <60>;

		cdns,tchsh-ns = <60>;

		cdns,tslch-ns = <60>;

		cdns,read-delay = <0>;

		#address-cells = <1>;

		#size-cells = <1>;

	};

};

arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts

+150 −0
Original line number Diff line number Diff line
@@ -67,6 +67,46 @@ main_usbss1_pins_default: main_usbss1_pins_default { 
			J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */

		>;

	};



	main_i2c1_exp4_pins_default: main-i2c1-exp4-pins-default {

		pinctrl-single,pins = <

			J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */

		>;

	};



	main_i2c0_pins_default: main-i2c0-pins-default {

		pinctrl-single,pins = <

			J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */

			J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */

		>;

	};



	main_i2c1_pins_default: main-i2c1-pins-default {

		pinctrl-single,pins = <

			J721E_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (Y6) I2C1_SCL */

			J721E_IOPAD(0x22c, PIN_INPUT_PULLUP, 0) /* (AA6) I2C1_SDA */

		>;

	};



	main_i2c3_pins_default: main-i2c3-pins-default {

		pinctrl-single,pins = <

			J721E_IOPAD(0x270, PIN_INPUT_PULLUP, 4) /* (T26) MMC2_CLK.I2C3_SCL */

			J721E_IOPAD(0x274, PIN_INPUT_PULLUP, 4) /* (T25) MMC2_CMD.I2C3_SDA */

		>;

	};



	main_i2c6_pins_default: main-i2c6-pins-default {

		pinctrl-single,pins = <

			J721E_IOPAD(0x1d0, PIN_INPUT_PULLUP, 2) /* (AA3) SPI0_D1.I2C6_SCL */

			J721E_IOPAD(0x1e4, PIN_INPUT_PULLUP, 2) /* (Y2) SPI1_D1.I2C6_SDA */

		>;

	};



	main_i2c1_exp4_pins_default: main-i2c1-exp4-pins-default {

		pinctrl-single,pins = <

			J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */

		 >;

	};

};



&wkup_pmx0 {
@@ -75,6 +115,19 @@ sw11_button_pins_default: sw11_button_pins_default { 
			J721E_WKUP_IOPAD(0xcc, PIN_INPUT, 7) /* (G28) WKUP_GPIO0_7 */

		>;

	};



	mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {

		pinctrl-single,pins = <

			J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */

			J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */

			J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */

			J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */

			J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */

			J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */

			J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */

			J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */

		>;

	};

};



&wkup_uart0 {
@@ -279,3 +332,100 @@ &usb1 { 
	dr_mode = "host";

	maximum-speed = "high-speed";

};



&ospi1 {

	pinctrl-names = "default";

	pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;



	flash@0{

		compatible = "jedec,spi-nor";

		reg = <0x0>;

		spi-tx-bus-width = <1>;

		spi-rx-bus-width = <4>;

		spi-max-frequency = <40000000>;

		cdns,tshsl-ns = <60>;

		cdns,tsd2d-ns = <60>;

		cdns,tchsh-ns = <60>;

		cdns,tslch-ns = <60>;

		cdns,read-delay = <2>;

		#address-cells = <1>;

		#size-cells = <1>;

	};

};



&tscadc0 {

	adc {

		ti,adc-channels = <0 1 2 3 4 5 6 7>;

	};

};



&tscadc1 {

	adc {

		ti,adc-channels = <0 1 2 3 4 5 6 7>;

	};

};



&main_i2c0 {

	pinctrl-names = "default";

	pinctrl-0 = <&main_i2c0_pins_default>;

	clock-frequency = <400000>;



	exp1: gpio@20 {

		compatible = "ti,tca6416";

		reg = <0x20>;

		gpio-controller;

		#gpio-cells = <2>;

	};



	exp2: gpio@22 {

		compatible = "ti,tca6424";

		reg = <0x22>;

		gpio-controller;

		#gpio-cells = <2>;

	};

};



&main_i2c1 {

	pinctrl-names = "default";

	pinctrl-0 = <&main_i2c1_pins_default>;

	clock-frequency = <400000>;



	exp4: gpio@20 {

		compatible = "ti,tca6408";

		reg = <0x20>;

		gpio-controller;

		#gpio-cells = <2>;

		pinctrl-names = "default";

		pinctrl-0 = <&main_i2c1_exp4_pins_default>;

		interrupt-parent = <&main_gpio1>;

		interrupts = <11 IRQ_TYPE_EDGE_FALLING>;

		interrupt-controller;

		#interrupt-cells = <2>;

	};

};



&main_i2c3 {

	pinctrl-names = "default";

	pinctrl-0 = <&main_i2c3_pins_default>;

	clock-frequency = <400000>;



	exp3: gpio@20 {

		compatible = "ti,tca6408";

		reg = <0x20>;

		gpio-controller;

		#gpio-cells = <2>;

	};

};



&main_i2c6 {

	pinctrl-names = "default";

	pinctrl-0 = <&main_i2c6_pins_default>;

	clock-frequency = <400000>;



	exp5: gpio@20 {

		compatible = "ti,tca6408";

		reg = <0x20>;

		gpio-controller;

		#gpio-cells = <2>;

	};

};

arch/arm64/boot/dts/ti/k3-j721e-main.dtsi

+100 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ gic_its: gic-its@1820000 { 
	smmu0: smmu@36600000 {

		compatible = "arm,smmu-v3";

		reg = <0x0 0x36600000 0x0 0x100000>;

		power-domains = <&k3_pds 229 TI_SCI_PD_EXCLUSIVE>;

		interrupt-parent = <&gic500>;

		interrupts = <GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,

			     <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>;
@@ -596,4 +597,103 @@ usb1: usb@6400000 { 
			dr_mode = "otg";

		};

	};



	main_i2c0: i2c@2000000 {

		compatible = "ti,j721e-i2c", "ti,omap4-i2c";

		reg = <0x0 0x2000000 0x0 0x100>;

		interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clock-names = "fck";

		clocks = <&k3_clks 187 0>;

		power-domains = <&k3_pds 187 TI_SCI_PD_SHARED>;

	};



	main_i2c1: i2c@2010000 {

		compatible = "ti,j721e-i2c", "ti,omap4-i2c";

		reg = <0x0 0x2010000 0x0 0x100>;

		interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clock-names = "fck";

		clocks = <&k3_clks 188 0>;

		power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;

	};



	main_i2c2: i2c@2020000 {

		compatible = "ti,j721e-i2c", "ti,omap4-i2c";

		reg = <0x0 0x2020000 0x0 0x100>;

		interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clock-names = "fck";

		clocks = <&k3_clks 189 0>;

		power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;

	};



	main_i2c3: i2c@2030000 {

		compatible = "ti,j721e-i2c", "ti,omap4-i2c";

		reg = <0x0 0x2030000 0x0 0x100>;

		interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clock-names = "fck";

		clocks = <&k3_clks 190 0>;

		power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;

	};



	main_i2c4: i2c@2040000 {

		compatible = "ti,j721e-i2c", "ti,omap4-i2c";

		reg = <0x0 0x2040000 0x0 0x100>;

		interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clock-names = "fck";

		clocks = <&k3_clks 191 0>;

		power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;

	};



	main_i2c5: i2c@2050000 {

		compatible = "ti,j721e-i2c", "ti,omap4-i2c";

		reg = <0x0 0x2050000 0x0 0x100>;

		interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clock-names = "fck";

		clocks = <&k3_clks 192 0>;

		power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;

	};



	main_i2c6: i2c@2060000 {

		compatible = "ti,j721e-i2c", "ti,omap4-i2c";

		reg = <0x0 0x2060000 0x0 0x100>;

		interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;

		#address-cells = <1>;

		#size-cells = <0>;

		clock-names = "fck";

		clocks = <&k3_clks 193 0>;

		power-domains = <&k3_pds 193 TI_SCI_PD_EXCLUSIVE>;

	};



	ufs_wrapper: ufs-wrapper@4e80000 {

		compatible = "ti,j721e-ufs";

		reg = <0x0 0x4e80000 0x0 0x100>;

		power-domains = <&k3_pds 277 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 277 1>;

		assigned-clocks = <&k3_clks 277 1>;

		assigned-clock-parents = <&k3_clks 277 4>;

		ranges;

		#address-cells = <2>;

		#size-cells = <2>;



		ufs@4e84000 {

			compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";

			reg = <0x0 0x4e84000 0x0 0x10000>;

			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;

			freq-table-hz = <250000000 250000000>, <19200000 19200000>, <19200000 19200000>;

			clocks = <&k3_clks 277 0>, <&k3_clks 277 1>, <&k3_clks 277 1>;

			clock-names = "core_clk", "phy_clk", "ref_clk";

			dma-coherent;

		};

	};

};