Unverified Commit bd5a649b authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'renesas-dts-for-v6.3-tag1' of...

Merge tag 'renesas-dts-for-v6.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas DT updates for v6.3

  - Enable watchdog and timer (OSTM) support for the RZ/Five SMARC EVK
    development board,
  - Add operating points for the Cortex-A55 CPU cores on the R-Car S4-8
    SoC,
  - Add display support for the R-Car V4H SoC and the White-Hawk
    development board,
  - Add eMMC and SDHI support for the RZ/V2M SoC,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: condor-i: add HS400 support for eMMC
  arm64: boot: dts: r8a774[a/b/e]1-beacon: Consolidate sound clocks
  riscv: dts: renesas: rzfive-smarc-som: Enable OSTM nodes
  arm64: dts: renesas: ulcb-kf: Fix pca9548 i2c-mux node names
  arm64: dts: renesas: r9a09g011: Add eMMC and SDHI support
  arm64: dts: renesas: white-hawk-cpu: Add DP output support
  arm64: dts: renesas: r8a779g0: Add display related nodes
  arm64: dts: renesas: r8a779f0: Add CA55 operating points
  riscv: dts: renesas: rzfive-smarc-som: Enable WDT

Link: https://lore.kernel.org/r/cover.1673702293.git.geert+renesas@glider.be


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents b7bfaa76 2ef9e3ef
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+19 −0
Original line number Diff line number Diff line
@@ -638,6 +638,25 @@ &rcar_sound {
	#clock-cells = <1>;
	clock-frequency = <11289600>;

	/* Reference versaclock instead of audio_clk_a */
	clocks = <&cpg CPG_MOD 1005>,
		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
		 <&versaclock6_bb 4>, <&audio_clk_b>,
		 <&audio_clk_c>,
		 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;

	status = "okay";

	ports {
+0 −21
Original line number Diff line number Diff line
@@ -58,24 +58,3 @@ &du {
	clock-names = "du.0", "du.1", "du.2",
		      "dclkin.0", "dclkin.1", "dclkin.2";
};

/* Reference versaclock instead of audio_clk_a */
&rcar_sound {
	clocks = <&cpg CPG_MOD 1005>,
		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
		 <&versaclock6_bb 4>, <&audio_clk_b>,
		 <&audio_clk_c>,
		 <&cpg CPG_CORE R8A774A1_CLK_S0D4>;
};
+0 −21
Original line number Diff line number Diff line
@@ -46,24 +46,3 @@ &du {
	clock-names = "du.0", "du.1", "du.3",
		"dclkin.0", "dclkin.1", "dclkin.3";
};

/* Reference versaclock instead of audio_clk_a */
&rcar_sound {
	clocks = <&cpg CPG_MOD 1005>,
		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
		 <&versaclock6_bb 4>, <&audio_clk_b>,
		 <&audio_clk_c>,
		 <&cpg CPG_CORE R8A774B1_CLK_S0D4>;
};
+0 −21
Original line number Diff line number Diff line
@@ -51,24 +51,3 @@ &du {
	clock-names = "du.0", "du.1", "du.3",
		"dclkin.0", "dclkin.1", "dclkin.3";
};

/* Reference versaclock instead of audio_clk_a */
&rcar_sound {
	clocks = <&cpg CPG_MOD 1005>,
		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
		 <&versaclock6_bb 4>, <&audio_clk_b>,
		 <&audio_clk_c>,
		 <&cpg CPG_CORE R8A774E1_CLK_S0D4>;
};
+4 −0
Original line number Diff line number Diff line
@@ -13,3 +13,7 @@ / {
	model = "Renesas Condor-I board based on r8a77980A (ES2.0)";
	compatible = "renesas,condor-i", "renesas,r8a77980a", "renesas,r8a77980";
};

&mmc0 {
	mmc-hs400-1_8v;
};
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