Loading drivers/acpi/video_detect.c +0 −20 Original line number Diff line number Diff line Loading @@ -170,26 +170,6 @@ static int video_detect_portege_r100(const struct dmi_system_id *d) return 0; } static int video_detect_portege_r100(const struct dmi_system_id *d) { struct pci_dev *dev; /* Search for Trident CyberBlade XP4m32 to confirm Portégé R100 */ dev = pci_get_device(PCI_VENDOR_ID_TRIDENT, 0x2100, NULL); if (dev) acpi_backlight_dmi = acpi_backlight_vendor; return 0; } static int video_detect_portege_r100(const struct dmi_system_id *d) { struct pci_dev *dev; /* Search for Trident CyberBlade XP4m32 to confirm Portégé R100 */ dev = pci_get_device(PCI_VENDOR_ID_TRIDENT, 0x2100, NULL); if (dev) acpi_backlight_dmi = acpi_backlight_vendor; return 0; } static const struct dmi_system_id video_detect_dmi_table[] = { /* * Models which should use the vendor backlight interface, Loading drivers/pci/pcie/aspm.c +0 −95 Original line number Diff line number Diff line Loading @@ -1020,101 +1020,6 @@ void pcie_aspm_pm_state_change(struct pci_dev *pdev) up_read(&pci_bus_sem); } /* @pdev: the root port or switch downstream port */ void pcie_aspm_pm_state_change(struct pci_dev *pdev) { struct pcie_link_state *link = pdev->link_state; if (aspm_disabled || !link) return; /* * Devices changed PM state, we should recheck if latency * meets all functions' requirement */ down_read(&pci_bus_sem); mutex_lock(&aspm_lock); pcie_update_aspm_capable(link->root); pcie_config_aspm_path(link); mutex_unlock(&aspm_lock); up_read(&pci_bus_sem); } /* @pdev: the root port or switch downstream port */ void pcie_aspm_pm_state_change(struct pci_dev *pdev) { struct pcie_link_state *link = pdev->link_state; if (aspm_disabled || !link) return; /* * Devices changed PM state, we should recheck if latency * meets all functions' requirement */ down_read(&pci_bus_sem); mutex_lock(&aspm_lock); pcie_update_aspm_capable(link->root); pcie_config_aspm_path(link); mutex_unlock(&aspm_lock); up_read(&pci_bus_sem); } /* @pdev: the root port or switch downstream port */ void pcie_aspm_pm_state_change(struct pci_dev *pdev) { struct pcie_link_state *link = pdev->link_state; if (aspm_disabled || !link) return; /* * Devices changed PM state, we should recheck if latency * meets all functions' requirement */ down_read(&pci_bus_sem); mutex_lock(&aspm_lock); pcie_update_aspm_capable(link->root); pcie_config_aspm_path(link); mutex_unlock(&aspm_lock); up_read(&pci_bus_sem); } /* @pdev: the root port or switch downstream port */ void pcie_aspm_pm_state_change(struct pci_dev *pdev) { struct pcie_link_state *link = pdev->link_state; if (aspm_disabled || !link) return; /* * Devices changed PM state, we should recheck if latency * meets all functions' requirement */ down_read(&pci_bus_sem); mutex_lock(&aspm_lock); pcie_update_aspm_capable(link->root); pcie_config_aspm_path(link); mutex_unlock(&aspm_lock); up_read(&pci_bus_sem); } /* @pdev: the root port or switch downstream port */ void pcie_aspm_pm_state_change(struct pci_dev *pdev) { struct pcie_link_state *link = pdev->link_state; if (aspm_disabled || !link) return; /* * Devices changed PM state, we should recheck if latency * meets all functions' requirement */ down_read(&pci_bus_sem); mutex_lock(&aspm_lock); pcie_update_aspm_capable(link->root); pcie_config_aspm_path(link); mutex_unlock(&aspm_lock); up_read(&pci_bus_sem); } void pcie_aspm_powersave_config_link(struct pci_dev *pdev) { struct pcie_link_state *link = pdev->link_state; Loading Loading
drivers/acpi/video_detect.c +0 −20 Original line number Diff line number Diff line Loading @@ -170,26 +170,6 @@ static int video_detect_portege_r100(const struct dmi_system_id *d) return 0; } static int video_detect_portege_r100(const struct dmi_system_id *d) { struct pci_dev *dev; /* Search for Trident CyberBlade XP4m32 to confirm Portégé R100 */ dev = pci_get_device(PCI_VENDOR_ID_TRIDENT, 0x2100, NULL); if (dev) acpi_backlight_dmi = acpi_backlight_vendor; return 0; } static int video_detect_portege_r100(const struct dmi_system_id *d) { struct pci_dev *dev; /* Search for Trident CyberBlade XP4m32 to confirm Portégé R100 */ dev = pci_get_device(PCI_VENDOR_ID_TRIDENT, 0x2100, NULL); if (dev) acpi_backlight_dmi = acpi_backlight_vendor; return 0; } static const struct dmi_system_id video_detect_dmi_table[] = { /* * Models which should use the vendor backlight interface, Loading
drivers/pci/pcie/aspm.c +0 −95 Original line number Diff line number Diff line Loading @@ -1020,101 +1020,6 @@ void pcie_aspm_pm_state_change(struct pci_dev *pdev) up_read(&pci_bus_sem); } /* @pdev: the root port or switch downstream port */ void pcie_aspm_pm_state_change(struct pci_dev *pdev) { struct pcie_link_state *link = pdev->link_state; if (aspm_disabled || !link) return; /* * Devices changed PM state, we should recheck if latency * meets all functions' requirement */ down_read(&pci_bus_sem); mutex_lock(&aspm_lock); pcie_update_aspm_capable(link->root); pcie_config_aspm_path(link); mutex_unlock(&aspm_lock); up_read(&pci_bus_sem); } /* @pdev: the root port or switch downstream port */ void pcie_aspm_pm_state_change(struct pci_dev *pdev) { struct pcie_link_state *link = pdev->link_state; if (aspm_disabled || !link) return; /* * Devices changed PM state, we should recheck if latency * meets all functions' requirement */ down_read(&pci_bus_sem); mutex_lock(&aspm_lock); pcie_update_aspm_capable(link->root); pcie_config_aspm_path(link); mutex_unlock(&aspm_lock); up_read(&pci_bus_sem); } /* @pdev: the root port or switch downstream port */ void pcie_aspm_pm_state_change(struct pci_dev *pdev) { struct pcie_link_state *link = pdev->link_state; if (aspm_disabled || !link) return; /* * Devices changed PM state, we should recheck if latency * meets all functions' requirement */ down_read(&pci_bus_sem); mutex_lock(&aspm_lock); pcie_update_aspm_capable(link->root); pcie_config_aspm_path(link); mutex_unlock(&aspm_lock); up_read(&pci_bus_sem); } /* @pdev: the root port or switch downstream port */ void pcie_aspm_pm_state_change(struct pci_dev *pdev) { struct pcie_link_state *link = pdev->link_state; if (aspm_disabled || !link) return; /* * Devices changed PM state, we should recheck if latency * meets all functions' requirement */ down_read(&pci_bus_sem); mutex_lock(&aspm_lock); pcie_update_aspm_capable(link->root); pcie_config_aspm_path(link); mutex_unlock(&aspm_lock); up_read(&pci_bus_sem); } /* @pdev: the root port or switch downstream port */ void pcie_aspm_pm_state_change(struct pci_dev *pdev) { struct pcie_link_state *link = pdev->link_state; if (aspm_disabled || !link) return; /* * Devices changed PM state, we should recheck if latency * meets all functions' requirement */ down_read(&pci_bus_sem); mutex_lock(&aspm_lock); pcie_update_aspm_capable(link->root); pcie_config_aspm_path(link); mutex_unlock(&aspm_lock); up_read(&pci_bus_sem); } void pcie_aspm_powersave_config_link(struct pci_dev *pdev) { struct pcie_link_state *link = pdev->link_state; Loading