Commit bd8d0688 authored by Leo Yan's avatar Leo Yan Committed by Mathieu Poirier
Browse files

coresight: tmc-etf: Add comment for store ordering 



Since the function CS_LOCK() has contained memory barrier mb(), it
ensures the visibility of the AUX trace data before updating the
aux_head, thus it's needless to add any explicit barrier anymore.

Add comment to make clear for the barrier usage for ETF.

Signed-off-by: default avatarLeo Yan <leo.yan@linaro.org>
Link: https://lore.kernel.org/r/20210809111407.596077-4-leo.yan@linaro.org


Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
parent 26701ceb

drivers/hwtracing/coresight/coresight-tmc-etf.c

+5 −0
Original line number Diff line number Diff line
@@ -553,6 +553,11 @@ static unsigned long tmc_update_etf_buffer(struct coresight_device *csdev, 
	if (buf->snapshot)

		handle->head += to_read;



	/*

	 * CS_LOCK() contains mb() so it can ensure visibility of the AUX trace

	 * data before the aux_head is updated via perf_aux_output_end(), which

	 * is expected by the perf ring buffer.

	 */

	CS_LOCK(drvdata->base);

out:

	spin_unlock_irqrestore(&drvdata->spinlock, flags);