Commit bebf683b authored by Kartik's avatar Kartik Committed by Thierry Reding
Browse files

soc/tegra: fuse: Use platform info with SoC revision



Tegra pre-silicon platforms do not have chip revisions. This makes the
revision SoC attribute meaningless on these platforms.

Instead, populate the revision SoC attribute with a combination of the
platform name and the chip revision for silicon platforms, and simply
with the platform name on pre-silicon platforms.

Signed-off-by: default avatarKartik <kkartik@nvidia.com>
Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
Reviewed-by: default avatarJon Hunter <jonathanh@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 0474cc84
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+20 −2
Original line number Diff line number Diff line
@@ -35,6 +35,19 @@ static const char *tegra_revision_name[TEGRA_REVISION_MAX] = {
	[TEGRA_REVISION_A04]     = "A04",
};

static const char *tegra_platform_name[TEGRA_PLATFORM_MAX] = {
	[TEGRA_PLATFORM_SILICON]			= "Silicon",
	[TEGRA_PLATFORM_QT]				= "QT",
	[TEGRA_PLATFORM_SYSTEM_FPGA]			= "System FPGA",
	[TEGRA_PLATFORM_UNIT_FPGA]			= "Unit FPGA",
	[TEGRA_PLATFORM_ASIM_QT]			= "Asim QT",
	[TEGRA_PLATFORM_ASIM_LINSIM]			= "Asim Linsim",
	[TEGRA_PLATFORM_DSIM_ASIM_LINSIM]		= "Dsim Asim Linsim",
	[TEGRA_PLATFORM_VERIFICATION_SIMULATION]	= "Verification Simulation",
	[TEGRA_PLATFORM_VDK]				= "VDK",
	[TEGRA_PLATFORM_VSP]				= "VSP",
};

static const struct of_device_id car_match[] __initconst = {
	{ .compatible = "nvidia,tegra20-car", },
	{ .compatible = "nvidia,tegra30-car", },
@@ -370,8 +383,13 @@ struct device * __init tegra_soc_device_register(void)
		return NULL;

	attr->family = kasprintf(GFP_KERNEL, "Tegra");
	attr->revision = kasprintf(GFP_KERNEL, "%s",
	if (tegra_is_silicon())
		attr->revision = kasprintf(GFP_KERNEL, "%s %s",
					   tegra_platform_name[tegra_sku_info.platform],
					   tegra_revision_name[tegra_sku_info.revision]);
	else
		attr->revision = kasprintf(GFP_KERNEL, "%s",
					   tegra_platform_name[tegra_sku_info.platform]);
	attr->soc_id = kasprintf(GFP_KERNEL, "%u", tegra_get_chip_id());
	attr->custom_attr_group = fuse->soc->soc_attr_group;

+1 −0
Original line number Diff line number Diff line
@@ -156,6 +156,7 @@ void __init tegra_init_revision(void)
	}

	tegra_sku_info.sku_id = tegra_fuse_read_early(FUSE_SKU_INFO);
	tegra_sku_info.platform = tegra_get_platform();
}

void __init tegra_init_apbmisc(void)
+15 −0
Original line number Diff line number Diff line
@@ -34,6 +34,20 @@ enum tegra_revision {
	TEGRA_REVISION_MAX,
};

enum tegra_platform {
	TEGRA_PLATFORM_SILICON = 0,
	TEGRA_PLATFORM_QT,
	TEGRA_PLATFORM_SYSTEM_FPGA,
	TEGRA_PLATFORM_UNIT_FPGA,
	TEGRA_PLATFORM_ASIM_QT,
	TEGRA_PLATFORM_ASIM_LINSIM,
	TEGRA_PLATFORM_DSIM_ASIM_LINSIM,
	TEGRA_PLATFORM_VERIFICATION_SIMULATION,
	TEGRA_PLATFORM_VDK,
	TEGRA_PLATFORM_VSP,
	TEGRA_PLATFORM_MAX,
};

struct tegra_sku_info {
	int sku_id;
	int cpu_process_id;
@@ -47,6 +61,7 @@ struct tegra_sku_info {
	int gpu_speedo_id;
	int gpu_speedo_value;
	enum tegra_revision revision;
	enum tegra_platform platform;
};

#ifdef CONFIG_ARCH_TEGRA