Commit bf8198cc authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dpu: autodetect supported interrupts 



Declaring the mask of supported interrupts proved to be error-prone. It
is very easy to add a bit with no corresponding backing block or to miss
the INTF TE bit. Replace this with looping over the enabled INTF blocks
to setup the irq mask.

Reviewed-by: default avatarMarijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/549654/
Link: https://lore.kernel.org/r/20230727144543.1483630-4-dmitry.baryshkov@linaro.org
parent 370891f0

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

+15 −1
Original line number Diff line number Diff line
@@ -463,6 +463,7 @@ struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr, 
{

	struct dpu_hw_intr *intr;

	int nirq = MDP_INTR_MAX * 32;

	unsigned int i;



	if (!addr || !m)

		return ERR_PTR(-EINVAL);
@@ -480,7 +481,20 @@ struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr, 


	intr->total_irqs = nirq;



	intr->irq_mask = m->mdss_irqs;

	intr->irq_mask = BIT(MDP_SSPP_TOP0_INTR) |

			 BIT(MDP_SSPP_TOP0_INTR2) |

			 BIT(MDP_SSPP_TOP0_HIST_INTR);

	for (i = 0; i < m->intf_count; i++) {

		const struct dpu_intf_cfg *intf = &m->intf[i];



		if (intf->type == INTF_NONE)

			continue;



		intr->irq_mask |= BIT(MDP_INTFn_INTR(intf->id));



		if (intf->intr_tear_rd_ptr != -1)

			intr->irq_mask |= BIT(DPU_IRQ_REG(intf->intr_tear_rd_ptr));

	}



	spin_lock_init(&intr->irq_lock);

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h

+3 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ enum dpu_hw_intr_reg { 
	MDP_SSPP_TOP0_INTR,

	MDP_SSPP_TOP0_INTR2,

	MDP_SSPP_TOP0_HIST_INTR,

	/* All MDP_INTFn_INTR should come sequentially */

	MDP_INTF0_INTR,

	MDP_INTF1_INTR,

	MDP_INTF2_INTR,
@@ -33,6 +34,8 @@ enum dpu_hw_intr_reg { 
	MDP_INTR_MAX,

};



#define MDP_INTFn_INTR(intf)	(MDP_INTF0_INTR + (intf - INTF_0))



/* compatibility */

#define MDP_INTF0_7xxx_INTR MDP_INTF0_INTR

#define MDP_INTF1_7xxx_INTR MDP_INTF1_INTR