Commit bfd27f39 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/gr/gf100-: virtualise init_num_active_ltcs 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 02917aa3

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c

+9 −2
Original line number Diff line number Diff line
@@ -1930,6 +1930,13 @@ gf100_gr_init_gpc_mmu(struct gf100_gr *gr) 
	nvkm_wr32(device, 0x4188b8, nvkm_memory_addr(fb->mmu_rd) >> 8);

}



void

gf100_gr_init_num_active_ltcs(struct gf100_gr *gr)

{

	struct nvkm_device *device = gr->base.engine.subdev.device;

	nvkm_wr32(device, GPC_BCAST(0x08ac), nvkm_rd32(device, 0x100800));

}



void

gf100_gr_init_zcull(struct gf100_gr *gr)

{
@@ -1989,8 +1996,7 @@ gf100_gr_init(struct gf100_gr *gr) 


	gr->func->init_vsc_stream_master(gr);

	gr->func->init_zcull(gr);



	nvkm_wr32(device, GPC_BCAST(0x08ac), nvkm_rd32(device, 0x100800));

	gr->func->init_num_active_ltcs(gr);



	nvkm_wr32(device, 0x400500, 0x00010001);
@@ -2074,6 +2080,7 @@ gf100_gr = { 
	.init_gpc_mmu = gf100_gr_init_gpc_mmu,

	.init_vsc_stream_master = gf100_gr_init_vsc_stream_master,

	.init_zcull = gf100_gr_init_zcull,

	.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,

	.mmio = gf100_gr_pack_mmio,

	.fecs.ucode = &gf100_gr_fecs_ucode,

	.gpccs.ucode = &gf100_gr_gpccs_ucode,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h

+3 −3
Original line number Diff line number Diff line
@@ -126,10 +126,10 @@ struct gf100_gr_func { 
	void (*init_bios)(struct gf100_gr *);

	void (*init_vsc_stream_master)(struct gf100_gr *);

	void (*init_zcull)(struct gf100_gr *);

	void (*init_num_active_ltcs)(struct gf100_gr *);

	void (*init_rop_active_fbps)(struct gf100_gr *);

	void (*init_ppc_exceptions)(struct gf100_gr *);

	void (*init_swdx_pes_mask)(struct gf100_gr *);

	void (*init_num_active_ltcs)(struct gf100_gr *);

	void (*set_hww_esr_report_mask)(struct gf100_gr *);

	const struct gf100_gr_pack *mmio;

	struct {
@@ -149,6 +149,7 @@ int gf100_gr_rops(struct gf100_gr *); 
int gf100_gr_init(struct gf100_gr *);

void gf100_gr_init_vsc_stream_master(struct gf100_gr *);

void gf100_gr_init_zcull(struct gf100_gr *);

void gf100_gr_init_num_active_ltcs(struct gf100_gr *);



void gf117_gr_init_zcull(struct gf100_gr *);
@@ -160,6 +161,7 @@ void gk104_gr_init_ppc_exceptions(struct gf100_gr *); 
int gk20a_gr_init(struct gf100_gr *);



int gm200_gr_rops(struct gf100_gr *);

void gm200_gr_init_num_active_ltcs(struct gf100_gr *);



int gp100_gr_init(struct gf100_gr *);

void gp100_gr_init_rop_active_fbps(struct gf100_gr *);
@@ -315,7 +317,5 @@ void gm107_gr_init_bios(struct gf100_gr *); 


void gm200_gr_init_gpc_mmu(struct gf100_gr *);



void gp100_gr_init_num_active_ltcs(struct gf100_gr *gr);



void gp102_gr_init_swdx_pes_mask(struct gf100_gr *);

#endif

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.c

+1 −0
Original line number Diff line number Diff line
@@ -118,6 +118,7 @@ gf104_gr = { 
	.init_gpc_mmu = gf100_gr_init_gpc_mmu,

	.init_vsc_stream_master = gf100_gr_init_vsc_stream_master,

	.init_zcull = gf100_gr_init_zcull,

	.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,

	.mmio = gf104_gr_pack_mmio,

	.fecs.ucode = &gf100_gr_fecs_ucode,

	.gpccs.ucode = &gf100_gr_gpccs_ucode,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf108.c

+1 −0
Original line number Diff line number Diff line
@@ -116,6 +116,7 @@ gf108_gr = { 
	.init_r405a14 = gf108_gr_init_r405a14,

	.init_vsc_stream_master = gf100_gr_init_vsc_stream_master,

	.init_zcull = gf100_gr_init_zcull,

	.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,

	.mmio = gf108_gr_pack_mmio,

	.fecs.ucode = &gf100_gr_fecs_ucode,

	.gpccs.ucode = &gf100_gr_gpccs_ucode,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf110.c

+1 −0
Original line number Diff line number Diff line
@@ -90,6 +90,7 @@ gf110_gr = { 
	.init_gpc_mmu = gf100_gr_init_gpc_mmu,

	.init_vsc_stream_master = gf100_gr_init_vsc_stream_master,

	.init_zcull = gf100_gr_init_zcull,

	.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,

	.mmio = gf110_gr_pack_mmio,

	.fecs.ucode = &gf100_gr_fecs_ucode,

	.gpccs.ucode = &gf100_gr_gpccs_ucode,