Commit c021d9fe authored by Potin Lai's avatar Potin Lai Committed by Joel Stanley
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ARM: dts: aspeed: bletchley: Enable wdtrst1 



Enable WDTRST1 external signal to send a reset pulse to peripherals while
BMC reset.

Signed-off-by: default avatarPotin Lai <potin.lai.pt@gmail.com>
Reviewed-by: default avatarPatrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20221226054535.2836110-3-potin.lai.pt@gmail.com


Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent 107fb95f

arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts

+11 −0
Original line number Diff line number Diff line
@@ -1064,3 +1064,14 @@ pinctrl_gpiov2_unbiased_default: gpiov2 { 
		bias-disable;

	};

};



&wdt1 {

	status = "okay";

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_wdtrst1_default>;

	aspeed,reset-type = "soc";

	aspeed,external-signal;

	aspeed,ext-push-pull;

	aspeed,ext-active-high;

	aspeed,ext-pulse-duration = <256>;

};