ARM: dts: aspeed: bletchley: Enable wdtrst1
Enable WDTRST1 external signal to send a reset pulse to peripherals while BMC reset. Signed-off-by:Potin Lai <potin.lai.pt@gmail.com> Reviewed-by:
Patrick Williams <patrick@stwcx.xyz> Link: https://lore.kernel.org/r/20221226054535.2836110-3-potin.lai.pt@gmail.com Signed-off-by:
Joel Stanley <joel@jms.id.au>
Loading
Please sign in to comment