Commit c0f6799d authored by Borislav Petkov's avatar Borislav Petkov
Browse files

Merge tip:locking/core into tip:ras/core 



Pick up helpers inlining work in order to address more noinstr fallout
in the MCE code.

Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
parents 754e0b0e b008893b

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -3200,6 +3200,7 @@ ATOMIC INFRASTRUCTURE 
M:	Will Deacon <will@kernel.org>

M:	Peter Zijlstra <peterz@infradead.org>

R:	Boqun Feng <boqun.feng@gmail.com>

R:	Mark Rutland <mark.rutland@arm.com>

L:	linux-kernel@vger.kernel.org

S:	Maintained

F:	arch/*/include/asm/atomic*.h

arch/x86/include/asm/cpumask.h

+10 −0
Original line number Diff line number Diff line
@@ -20,11 +20,21 @@ static __always_inline bool arch_cpu_online(int cpu) 
{

	return arch_test_bit(cpu, cpumask_bits(cpu_online_mask));

}



static __always_inline void arch_cpumask_clear_cpu(int cpu, struct cpumask *dstp)

{

	arch_clear_bit(cpumask_check(cpu), cpumask_bits(dstp));

}

#else

static __always_inline bool arch_cpu_online(int cpu)

{

	return cpu == 0;

}



static __always_inline void arch_cpumask_clear_cpu(int cpu, struct cpumask *dstp)

{

	return;

}

#endif



#define arch_cpu_is_offline(cpu)	unlikely(!arch_cpu_online(cpu))

arch/x86/include/asm/ptrace.h

+1 −1
Original line number Diff line number Diff line
@@ -137,7 +137,7 @@ static __always_inline int user_mode(struct pt_regs *regs) 
#endif

}



static inline int v8086_mode(struct pt_regs *regs)

static __always_inline int v8086_mode(struct pt_regs *regs)

{

#ifdef CONFIG_X86_32

	return (regs->flags & X86_VM_MASK);

include/asm-generic/bitops/instrumented-atomic.h

+6 −6
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@ 
 * Note that @nr may be almost arbitrarily large; this function is not

 * restricted to acting on a single-word quantity.

 */

static inline void set_bit(long nr, volatile unsigned long *addr)

static __always_inline void set_bit(long nr, volatile unsigned long *addr)

{

	instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));

	arch_set_bit(nr, addr);
@@ -36,7 +36,7 @@ static inline void set_bit(long nr, volatile unsigned long *addr) 
 *

 * This is a relaxed atomic operation (no implied memory barriers).

 */

static inline void clear_bit(long nr, volatile unsigned long *addr)

static __always_inline void clear_bit(long nr, volatile unsigned long *addr)

{

	instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));

	arch_clear_bit(nr, addr);
@@ -52,7 +52,7 @@ static inline void clear_bit(long nr, volatile unsigned long *addr) 
 * Note that @nr may be almost arbitrarily large; this function is not

 * restricted to acting on a single-word quantity.

 */

static inline void change_bit(long nr, volatile unsigned long *addr)

static __always_inline void change_bit(long nr, volatile unsigned long *addr)

{

	instrument_atomic_write(addr + BIT_WORD(nr), sizeof(long));

	arch_change_bit(nr, addr);
@@ -65,7 +65,7 @@ static inline void change_bit(long nr, volatile unsigned long *addr) 
 *

 * This is an atomic fully-ordered operation (implied full memory barrier).

 */

static inline bool test_and_set_bit(long nr, volatile unsigned long *addr)

static __always_inline bool test_and_set_bit(long nr, volatile unsigned long *addr)

{

	kcsan_mb();

	instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));
@@ -79,7 +79,7 @@ static inline bool test_and_set_bit(long nr, volatile unsigned long *addr) 
 *

 * This is an atomic fully-ordered operation (implied full memory barrier).

 */

static inline bool test_and_clear_bit(long nr, volatile unsigned long *addr)

static __always_inline bool test_and_clear_bit(long nr, volatile unsigned long *addr)

{

	kcsan_mb();

	instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));
@@ -93,7 +93,7 @@ static inline bool test_and_clear_bit(long nr, volatile unsigned long *addr) 
 *

 * This is an atomic fully-ordered operation (implied full memory barrier).

 */

static inline bool test_and_change_bit(long nr, volatile unsigned long *addr)

static __always_inline bool test_and_change_bit(long nr, volatile unsigned long *addr)

{

	kcsan_mb();

	instrument_atomic_read_write(addr + BIT_WORD(nr), sizeof(long));

include/asm-generic/bitops/instrumented-non-atomic.h

+8 −8
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ 
 * region of memory concurrently, the effect may be that only one operation

 * succeeds.

 */

static inline void __set_bit(long nr, volatile unsigned long *addr)

static __always_inline void __set_bit(long nr, volatile unsigned long *addr)

{

	instrument_write(addr + BIT_WORD(nr), sizeof(long));

	arch___set_bit(nr, addr);
@@ -37,7 +37,7 @@ static inline void __set_bit(long nr, volatile unsigned long *addr) 
 * region of memory concurrently, the effect may be that only one operation

 * succeeds.

 */

static inline void __clear_bit(long nr, volatile unsigned long *addr)

static __always_inline void __clear_bit(long nr, volatile unsigned long *addr)

{

	instrument_write(addr + BIT_WORD(nr), sizeof(long));

	arch___clear_bit(nr, addr);
@@ -52,13 +52,13 @@ static inline void __clear_bit(long nr, volatile unsigned long *addr) 
 * region of memory concurrently, the effect may be that only one operation

 * succeeds.

 */

static inline void __change_bit(long nr, volatile unsigned long *addr)

static __always_inline void __change_bit(long nr, volatile unsigned long *addr)

{

	instrument_write(addr + BIT_WORD(nr), sizeof(long));

	arch___change_bit(nr, addr);

}



static inline void __instrument_read_write_bitop(long nr, volatile unsigned long *addr)

static __always_inline void __instrument_read_write_bitop(long nr, volatile unsigned long *addr)

{

	if (IS_ENABLED(CONFIG_KCSAN_ASSUME_PLAIN_WRITES_ATOMIC)) {

		/*
@@ -90,7 +90,7 @@ static inline void __instrument_read_write_bitop(long nr, volatile unsigned long 
 * This operation is non-atomic. If two instances of this operation race, one

 * can appear to succeed but actually fail.

 */

static inline bool __test_and_set_bit(long nr, volatile unsigned long *addr)

static __always_inline bool __test_and_set_bit(long nr, volatile unsigned long *addr)

{

	__instrument_read_write_bitop(nr, addr);

	return arch___test_and_set_bit(nr, addr);
@@ -104,7 +104,7 @@ static inline bool __test_and_set_bit(long nr, volatile unsigned long *addr) 
 * This operation is non-atomic. If two instances of this operation race, one

 * can appear to succeed but actually fail.

 */

static inline bool __test_and_clear_bit(long nr, volatile unsigned long *addr)

static __always_inline bool __test_and_clear_bit(long nr, volatile unsigned long *addr)

{

	__instrument_read_write_bitop(nr, addr);

	return arch___test_and_clear_bit(nr, addr);
@@ -118,7 +118,7 @@ static inline bool __test_and_clear_bit(long nr, volatile unsigned long *addr) 
 * This operation is non-atomic. If two instances of this operation race, one

 * can appear to succeed but actually fail.

 */

static inline bool __test_and_change_bit(long nr, volatile unsigned long *addr)

static __always_inline bool __test_and_change_bit(long nr, volatile unsigned long *addr)

{

	__instrument_read_write_bitop(nr, addr);

	return arch___test_and_change_bit(nr, addr);
@@ -129,7 +129,7 @@ static inline bool __test_and_change_bit(long nr, volatile unsigned long *addr) 
 * @nr: bit number to test

 * @addr: Address to start counting from

 */

static inline bool test_bit(long nr, const volatile unsigned long *addr)

static __always_inline bool test_bit(long nr, const volatile unsigned long *addr)

{

	instrument_atomic_read(addr + BIT_WORD(nr), sizeof(long));

	return arch_test_bit(nr, addr);