Commit c25300f0 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Nuke dev_priv->drrs.type 



When we found a downclock mode dev_priv->drrs.type is just a
straight copy of dev_priv->vbt.drrs_type. And in case we
couldn't find a downclock mode can_enable_drrs() won't let
us enable DRRS anyway so the minor distinction between the
two is irrelevant. So let's just nuke dev_priv->drrs.type
and consult the VBT version directly.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220311172428.14685-6-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 0032cfd6

drivers/gpu/drm/i915/display/intel_display_debugfs.c

+1 −1
Original line number Diff line number Diff line
@@ -1156,7 +1156,7 @@ static void drrs_status_per_crtc(struct seq_file *m, 
		seq_printf(m, "%s:\n", connector->name);



		if (connector->connector_type == DRM_MODE_CONNECTOR_eDP &&

		    drrs->type == DRRS_TYPE_SEAMLESS)

		    dev_priv->vbt.drrs_type == DRRS_TYPE_SEAMLESS)

			supported = true;



		seq_printf(m, "\tDRRS Supported: %s\n", str_yes_no(supported));

drivers/gpu/drm/i915/display/intel_drrs.c

+4 −6
Original line number Diff line number Diff line
@@ -65,7 +65,7 @@ static bool can_enable_drrs(struct intel_connector *connector, 
		return false;



	return connector->panel.downclock_mode &&

		i915->drrs.type == DRRS_TYPE_SEAMLESS;

		i915->vbt.drrs_type == DRRS_TYPE_SEAMLESS;

}



void
@@ -154,7 +154,7 @@ static void intel_drrs_set_state(struct drm_i915_private *dev_priv, 
		return;

	}



	if (dev_priv->drrs.type != DRRS_TYPE_SEAMLESS) {

	if (dev_priv->vbt.drrs_type != DRRS_TYPE_SEAMLESS) {

		drm_dbg_kms(&dev_priv->drm, "Only Seamless DRRS supported.\n");

		return;

	}
@@ -269,7 +269,7 @@ intel_drrs_update(struct intel_dp *intel_dp, 
{

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);



	if (dev_priv->drrs.type != DRRS_TYPE_SEAMLESS)

	if (dev_priv->vbt.drrs_type != DRRS_TYPE_SEAMLESS)

		return;



	mutex_lock(&dev_priv->drrs.mutex);
@@ -325,7 +325,7 @@ static void intel_drrs_frontbuffer_update(struct drm_i915_private *dev_priv, 
	struct drm_crtc *crtc;

	enum pipe pipe;



	if (dev_priv->drrs.type != DRRS_TYPE_SEAMLESS)

	if (dev_priv->vbt.drrs_type != DRRS_TYPE_SEAMLESS)

		return;



	cancel_delayed_work(&dev_priv->drrs.work);
@@ -460,8 +460,6 @@ intel_drrs_init(struct intel_connector *connector, 
		return NULL;

	}



	dev_priv->drrs.type = dev_priv->vbt.drrs_type;



	dev_priv->drrs.refresh_rate = DRRS_REFRESH_RATE_HIGH;

	drm_dbg_kms(&dev_priv->drm,

		    "[CONNECTOR:%d:%s] seamless DRRS supported\n",

drivers/gpu/drm/i915/i915_drv.h

+0 −1
Original line number Diff line number Diff line
@@ -213,7 +213,6 @@ struct i915_drrs { 
	struct intel_dp *dp;

	unsigned busy_frontbuffer_bits;

	enum drrs_refresh_rate refresh_rate;

	enum drrs_type type;

};



#define QUIRK_LVDS_SSC_DISABLE (1<<1)