Commit c452e3bd authored by Ilpo Järvinen's avatar Ilpo Järvinen Committed by Lee Jones
Browse files

mfd: intel-m10-bmc: Create m10bmc_sys_update_bits()



Wrap regmap_update_bits() with m10bmc_sys_update_bits() in order to be
able to add additional checks into it.

Co-developed-by: default avatarRuss Weight <russell.h.weight@intel.com>
Signed-off-by: default avatarRuss Weight <russell.h.weight@intel.com>
Signed-off-by: default avatarIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: default avatarXu Yilun <yilun.xu@intel.com>
Signed-off-by: default avatarLee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230417092653.16487-3-ilpo.jarvinen@linux.intel.com
parent b3ecc7f3
Loading
Loading
Loading
Loading
+14 −16
Original line number Diff line number Diff line
@@ -376,8 +376,7 @@ static enum fw_upload_err rsu_update_init(struct m10bmc_sec *sec)
	u32 doorbell_reg, progress, status;
	int ret, err;

	ret = regmap_update_bits(sec->m10bmc->regmap,
				 csr_map->base + csr_map->doorbell,
	ret = m10bmc_sys_update_bits(sec->m10bmc, csr_map->doorbell,
				     DRBL_RSU_REQUEST | DRBL_HOST_STATUS,
				     DRBL_RSU_REQUEST |
				     FIELD_PREP(DRBL_HOST_STATUS,
@@ -450,8 +449,7 @@ static enum fw_upload_err rsu_send_data(struct m10bmc_sec *sec)
	u32 doorbell_reg, status;
	int ret;

	ret = regmap_update_bits(sec->m10bmc->regmap,
				 csr_map->base + csr_map->doorbell,
	ret = m10bmc_sys_update_bits(sec->m10bmc, csr_map->doorbell,
				     DRBL_HOST_STATUS,
				     FIELD_PREP(DRBL_HOST_STATUS,
						HOST_STATUS_WRITE_DONE));
@@ -517,8 +515,7 @@ static enum fw_upload_err rsu_cancel(struct m10bmc_sec *sec)
	if (rsu_prog(doorbell) != RSU_PROG_READY)
		return FW_UPLOAD_ERR_BUSY;

	ret = regmap_update_bits(sec->m10bmc->regmap,
				 csr_map->base + csr_map->doorbell,
	ret = m10bmc_sys_update_bits(sec->m10bmc, csr_map->doorbell,
				     DRBL_HOST_STATUS,
				     FIELD_PREP(DRBL_HOST_STATUS,
						HOST_STATUS_ABORT_RSU));
@@ -764,3 +761,4 @@ module_platform_driver(intel_m10bmc_sec_driver);
MODULE_AUTHOR("Intel Corporation");
MODULE_DESCRIPTION("Intel MAX10 BMC Secure Update");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(INTEL_M10_BMC_CORE);
+9 −0
Original line number Diff line number Diff line
@@ -12,6 +12,15 @@
#include <linux/mfd/intel-m10-bmc.h>
#include <linux/module.h>

int m10bmc_sys_update_bits(struct intel_m10bmc *m10bmc, unsigned int offset,
			   unsigned int msk, unsigned int val)
{
	const struct m10bmc_csr_map *csr_map = m10bmc->info->csr_map;

	return regmap_update_bits(m10bmc->regmap, csr_map->base + offset, msk, val);
}
EXPORT_SYMBOL_NS_GPL(m10bmc_sys_update_bits, INTEL_M10_BMC_CORE);

static ssize_t bmc_version_show(struct device *dev,
				struct device_attribute *attr, char *buf)
{
+4 −0
Original line number Diff line number Diff line
@@ -251,6 +251,7 @@ struct intel_m10bmc {
 *
 * m10bmc_raw_read - read m10bmc register per addr
 * m10bmc_sys_read - read m10bmc system register per offset
 * m10bmc_sys_update_bits - update m10bmc system register per offset
 */
static inline int
m10bmc_raw_read(struct intel_m10bmc *m10bmc, unsigned int addr,
@@ -282,6 +283,9 @@ static inline int m10bmc_sys_read(struct intel_m10bmc *m10bmc, unsigned int offs
	return m10bmc_raw_read(m10bmc, csr_map->base + offset, val);
}

int m10bmc_sys_update_bits(struct intel_m10bmc *m10bmc, unsigned int offset,
			   unsigned int msk, unsigned int val);

/*
 * MAX10 BMC Core support
 */