Commit c4a179c7 authored by Benjamin Gaignard's avatar Benjamin Gaignard Committed by Mauro Carvalho Chehab
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media: uapi: HEVC: Change pic_order_cnt definition in v4l2_hevc_dpb_entry



The HEVC specification describes the following:
"PicOrderCntVal is derived as follows:
PicOrderCntVal = PicOrderCntMsb + slice_pic_order_cnt_lsb
The value of PicOrderCntVal shall be in the range of
−2^31 to 2^31 − 1, inclusive."

To match with these definitions change __u16 pic_order_cnt[2]
into __s32 pic_order_cnt_val.
Change v4l2_ctrl_hevc_slice_params->slice_pic_order_cnt to __s32 too.

Signed-off-by: default avatarBenjamin Gaignard <benjamin.gaignard@collabora.com>
Reviewed-by: default avatarEzequiel Garcia <ezequiel@vanguardiasur.com.ar>
Acked-by: default avatarNicolas Dufresne <nicolas.dufresne@collabora.com>
Tested-by: default avatarJernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@kernel.org>
parent b92de2f9
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+1 −1
Original line number Diff line number Diff line
@@ -3010,7 +3010,7 @@ enum v4l2_mpeg_video_hevc_size_of_length_field -
    * - __u8
      - ``colour_plane_id``
      -
    * - __u16
    * - __s32
      - ``slice_pic_order_cnt``
      -
    * - __u8
+3 −4
Original line number Diff line number Diff line
@@ -390,11 +390,10 @@ static int set_ref(struct hantro_ctx *ctx)
			 !!(pps->flags & V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED));

	/*
	 * Write POC count diff from current pic. For frame decoding only compute
	 * pic_order_cnt[0] and ignore pic_order_cnt[1] used in field-coding.
	 * Write POC count diff from current pic.
	 */
	for (i = 0; i < decode_params->num_active_dpb_entries && i < ARRAY_SIZE(cur_poc); i++) {
		char poc_diff = decode_params->pic_order_cnt_val - dpb[i].pic_order_cnt[0];
		char poc_diff = decode_params->pic_order_cnt_val - dpb[i].pic_order_cnt_val;

		hantro_reg_write(vpu, &cur_poc[i], poc_diff);
	}
@@ -421,7 +420,7 @@ static int set_ref(struct hantro_ctx *ctx)
	dpb_longterm_e = 0;
	for (i = 0; i < decode_params->num_active_dpb_entries &&
	     i < (V4L2_HEVC_DPB_ENTRIES_NUM_MAX - 1); i++) {
		luma_addr = hantro_hevc_get_ref_buf(ctx, dpb[i].pic_order_cnt[0]);
		luma_addr = hantro_hevc_get_ref_buf(ctx, dpb[i].pic_order_cnt_val);
		if (!luma_addr)
			return -ENOMEM;

+1 −1
Original line number Diff line number Diff line
@@ -33,7 +33,7 @@ void hantro_hevc_ref_init(struct hantro_ctx *ctx)
}

dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx,
				   int poc)
				   s32 poc)
{
	struct hantro_hevc_dec_hw_ctx *hevc_dec = &ctx->hevc_dec;
	int i;
+2 −2
Original line number Diff line number Diff line
@@ -145,7 +145,7 @@ struct hantro_hevc_dec_hw_ctx {
	struct hantro_aux_buf tile_bsd;
	struct hantro_aux_buf ref_bufs[NUM_REF_PICTURES];
	struct hantro_aux_buf scaling_lists;
	int ref_bufs_poc[NUM_REF_PICTURES];
	s32 ref_bufs_poc[NUM_REF_PICTURES];
	u32 ref_bufs_used;
	struct hantro_hevc_dec_ctrls ctrls;
	unsigned int num_tile_cols_allocated;
@@ -358,7 +358,7 @@ void hantro_hevc_dec_exit(struct hantro_ctx *ctx);
int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx);
int hantro_hevc_dec_prepare_run(struct hantro_ctx *ctx);
void hantro_hevc_ref_init(struct hantro_ctx *ctx);
dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, int poc);
dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, s32 poc);
int hantro_hevc_add_ref_buf(struct hantro_ctx *ctx, int poc, dma_addr_t addr);
int hantro_hevc_validate_sps(struct hantro_ctx *ctx, const struct v4l2_ctrl_hevc_sps *sps);

+2 −2
Original line number Diff line number Diff line
@@ -143,8 +143,8 @@ static void cedrus_h265_frame_info_write_dpb(struct cedrus_ctx *ctx,
	for (i = 0; i < num_active_dpb_entries; i++) {
		int buffer_index = vb2_find_timestamp(vq, dpb[i].timestamp, 0);
		u32 pic_order_cnt[2] = {
			dpb[i].pic_order_cnt[0],
			dpb[i].pic_order_cnt[1]
			dpb[i].pic_order_cnt_val,
			dpb[i].pic_order_cnt_val
		};

		cedrus_h265_frame_info_write_single(ctx, i, dpb[i].field_pic,
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