Commit c4f294fd authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Florian Fainelli
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ARM: dts: bcm: Align L2 cache-controller nodename with dtschema 



Fix dtschema validator warnings like:
    l2-cache@22000: $nodename:0:
        'l2-cache@22000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'

Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Acked-by: default avatarScott Branden <scott.branden@broadcom.com>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent 99e5a329

arch/arm/boot/dts/bcm-cygnus.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -91,7 +91,7 @@ gic: interrupt-controller@21000 { 
			      <0x20100 0x100>;

		};



		L2: l2-cache@22000 {

		L2: cache-controller@22000 {

			compatible = "arm,pl310-cache";

			reg = <0x22000 0x1000>;

			cache-unified;

arch/arm/boot/dts/bcm-hr2.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -104,7 +104,7 @@ gic: interrupt-controller@21000 { 
			      <0x20100 0x100>;

		};



		L2: l2-cache@22000 {

		L2: cache-controller@22000 {

			compatible = "arm,pl310-cache";

			reg = <0x22000 0x1000>;

			cache-unified;

arch/arm/boot/dts/bcm-nsp.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -122,7 +122,7 @@ gic: interrupt-controller@21000 { 
			      <0x20100 0x100>;

		};



		L2: l2-cache@22000 {

		L2: cache-controller@22000 {

			compatible = "arm,pl310-cache";

			reg = <0x22000 0x1000>;

			cache-unified;

arch/arm/boot/dts/bcm21664.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -90,7 +90,7 @@ uart@3e002000 { 
		reg-io-width = <4>;

	};



	L2: l2-cache@3ff20000 {

	L2: cache-controller@3ff20000 {

		compatible = "arm,pl310-cache";

		reg = <0x3ff20000 0x1000>;

		cache-unified;