Commit c8210d5a authored Jun 09, 2017 by Harry Wentland Committed by Alex Deucher Sep 26, 2017

drm/amd/display: Don't call DCN clk code for Vega



Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 1159898a

drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c

+6 −4

Original line number	Diff line number	Diff line
		@@ -614,11 +614,13 @@ static bool dce_apply_clock_voltage_request(
		}
		if (send_request) {
		#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
		if (clk->ctx->dce_version == DCN_VERSION_1_0) {
		struct core_dc *core_dc = DC_TO_CORE(clk->ctx->dc);
		/use dcfclk request voltage/
		clock_voltage_req.clk_type = DM_PP_CLOCK_TYPE_DCFCLK;
		clock_voltage_req.clocks_in_khz =
		dcn_find_dcfclk_suits_all(core_dc, &clk->cur_clocks_value);
		}
		#endif
		dm_pp_apply_clock_for_voltage_request(
		clk->ctx, &clock_voltage_req);

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -1633,7 +1633,7 @@ enum dc_status dce110_apply_ctx_to_hw(
		apply_min_clocks(dc, context, &clocks_state, true);

		#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
		if (resource_parse_asic_id(dc->ctx->asic_id) == DCN_VERSION_1_0) {
		if (dc->ctx->dce_version == DCN_VERSION_1_0) {
		if (context->bw.dcn.calc_clk.fclk_khz
		> dc->current_context->bw.dcn.cur_clk.fclk_khz) {
		struct dm_pp_clock_for_voltage_req clock;