Commit c88af76f authored by Michael Straube's avatar Michael Straube Committed by Greg Kroah-Hartman
Browse files

staging: rtl8192e: remove blank lines



Remove unnecessary blank lines reported by checkpatch.

Signed-off-by: default avatarMichael Straube <straube.linux@gmail.com>
Tested-by: default avatarPhilipp Hortmann <philipp.g.hortmann@gmail.com>
Message-ID: <20230531053118.17053-1-straube.linux@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 00eca57d
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+0 −8
Original line number Diff line number Diff line
@@ -85,7 +85,6 @@ enum rtl819x_loopback {
#define HAL_PRIME_CHNL_OFFSET_LOWER		1
#define HAL_PRIME_CHNL_OFFSET_UPPER		2


enum version_8190_loopback {
	VERSION_8190_BD = 0x3,
	VERSION_8190_BE
@@ -139,8 +138,6 @@ struct tx_fwinfo_8190pci {
	u32			Retry_Limit:4;
	u32			Reserved2:1;
	u32			PacketID:13;


};

struct phy_ofdm_rx_status_rxsc_sgien_exintfflag {
@@ -172,7 +169,6 @@ struct phy_sts_cck_819xpci {
	u8	cck_agc_rpt;
};


#define		PHY_RSSI_SLID_WIN_MAX				100
#define		PHY_Beacon_RSSI_SLID_WIN_MAX		10

@@ -214,7 +210,6 @@ struct tx_desc {
	u32	Reserved7;
};


struct tx_desc_cmd {
	u16	PktSize;
	u8	Reserved1;
@@ -256,10 +251,8 @@ struct rx_desc {
	u32			Reserved3;

	u32	BufferAddress;

};


struct rx_fwinfo {
	u16			Reserved1:12;
	u16			PartAggr:1;
@@ -278,7 +271,6 @@ struct rx_fwinfo {
	u8			Reserved4:1;

	u32			TSFL;

};

#endif
+0 −14
Original line number Diff line number Diff line
@@ -107,7 +107,6 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)
		}

		rtl92e_writeb(dev, MSR, btMsr);

	}
	break;

@@ -126,7 +125,6 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)

		rtl92e_writel(dev, RCR, RegRCR);
		priv->receive_config = RegRCR;

	}
	break;

@@ -266,7 +264,6 @@ void rtl92e_set_reg(struct net_device *dev, u8 variable, u8 *val)
	default:
		break;
	}

}

static void _rtl92e_read_eeprom_info(struct net_device *dev)
@@ -714,7 +711,6 @@ bool rtl92e_start_adapter(struct net_device *dev)

static void _rtl92e_net_update(struct net_device *dev)
{

	struct r8192_priv *priv = rtllib_priv(dev);
	struct rtllib_network *net;
	u16 BcnTimeCfg = 0, BcnCW = 6, BcnIFS = 0xf;
@@ -1006,7 +1002,6 @@ void rtl92e_fill_tx_desc(struct net_device *dev, struct tx_desc *pdesc,
	pdesc->SecCAMID = 0;
	pdesc->RATid = cb_desc->ratr_index;


	pdesc->NoEnc = 1;
	pdesc->SecType = 0x0;
	if (cb_desc->bHwSec) {
@@ -1213,7 +1208,6 @@ static long _rtl92e_signal_scale_mapping(struct r8192_priv *priv, long currsig)
	return retsig;
}


#define	 rx_hal_is_cck_rate(_pdrvinfo)\
			((_pdrvinfo->RxRate == DESC90_RATE1M ||\
			_pdrvinfo->RxRate == DESC90_RATE2M ||\
@@ -1261,7 +1255,6 @@ static void _rtl92e_query_rxphystatus(
		check_reg824 = 1;
	}


	prxpkt = (u8 *)pdrvinfo;

	prxpkt += sizeof(struct rx_fwinfo);
@@ -1368,7 +1361,6 @@ static void _rtl92e_query_rxphystatus(
			}
		}


		rx_pwr_all = (((pofdm_buf->pwdb_all) >> 1) & 0x7f) - 106;
		pwdb_all = rtl92e_rx_db_to_percent(rx_pwr_all);

@@ -1485,7 +1477,6 @@ static void _rtl92e_process_phyinfo(struct r8192_priv *priv, u8 *buffer,
		}
	}


	if (prev_st->bPacketBeacon) {
		if (slide_beacon_adc_pwdb_statistics++ >=
		    PHY_Beacon_RSSI_SLID_WIN_MAX) {
@@ -1802,7 +1793,6 @@ void rtl92e_stop_adapter(struct net_device *dev, bool reset)
			rtl92e_writel(dev, WFCRC1, 0xffffffff);
			rtl92e_writel(dev, WFCRC2, 0xffffffff);


			rtl92e_writeb(dev, PMR, 0x5);
			rtl92e_writeb(dev, MAC_BLK_CTRL, 0xa);
		}
@@ -1897,7 +1887,6 @@ void rtl92e_enable_irq(struct net_device *dev)
	priv->irq_enabled = 1;

	rtl92e_writel(dev, INTA_MASK, priv->irq_mask[0]);

}

void rtl92e_disable_irq(struct net_device *dev)
@@ -1929,7 +1918,6 @@ void rtl92e_enable_tx(struct net_device *dev)
		rtl92e_writel(dev, TX_DESC_BASE[i], priv->tx_ring[i].dma);
}


void rtl92e_ack_irq(struct net_device *dev, u32 *p_inta, u32 *p_intb)
{
	*p_inta = rtl92e_readl(dev, ISR);
@@ -1986,8 +1974,6 @@ bool rtl92e_is_rx_stuck(struct net_device *dev)
				TotalRxStuckCount +=
					 priv->silent_reset_rx_stuck_event[i];
		}


	} else {
		priv->silent_reset_rx_stuck_event[SlotIndex] = 0;
	}
+0 −20
Original line number Diff line number Diff line
@@ -32,7 +32,6 @@ static u32 _rtl92e_calculate_bit_shift(u32 dwBitMask)
void rtl92e_set_bb_reg(struct net_device *dev, u32 dwRegAddr, u32 dwBitMask,
		       u32 dwData)
{

	u32 OriginalValue, BitShift, NewValue;

	if (dwBitMask != bMaskDWord) {
@@ -99,7 +98,6 @@ static u32 _rtl92e_phy_rf_read(struct net_device *dev,
	rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);

	return ret;

}

static void _rtl92e_phy_rf_write(struct net_device *dev,
@@ -226,7 +224,6 @@ static u32 _rtl92e_phy_rf_fw_read(struct net_device *dev,
			return 0;
	}
	return rtl92e_readl(dev, RF_DATA);

}

static void _rtl92e_phy_rf_fw_write(struct net_device *dev,
@@ -247,10 +244,8 @@ static void _rtl92e_phy_rf_fw_write(struct net_device *dev,
			break;
	}
	rtl92e_writel(dev, QPNR, Data);

}


void rtl92e_config_mac(struct net_device *dev)
{
	u32 dwArrayLen = 0, i = 0;
@@ -272,7 +267,6 @@ void rtl92e_config_mac(struct net_device *dev)
				  pdwArray[i + 2]);
	}
	return;

}

static void _rtl92e_phy_config_bb(struct net_device *dev, u8 ConfigType)
@@ -370,7 +364,6 @@ bool rtl92e_check_bb_and_rf(struct net_device *dev, enum hw90_block CheckBlock,
			break;
		}


		if (dwRegRead != WriteData[i]) {
			netdev_warn(dev, "%s(): Check failed.\n", __func__);
			ret = false;
@@ -415,7 +408,6 @@ static bool _rtl92e_bb_config_para_file(struct net_device *dev)
		rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage,
				  (bXBTxAGC | bXCTxAGC | bXDTxAGC), dwRegValue);


		dwRegValue = priv->crystal_cap;
		rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, bXtalCap92x,
				  dwRegValue);
@@ -470,7 +462,6 @@ void rtl92e_set_tx_power(struct net_device *dev, u8 channel)

u8 rtl92e_config_rf_path(struct net_device *dev, enum rf90_radio_path eRFPath)
{

	int i;

	switch (eRFPath) {
@@ -483,7 +474,6 @@ u8 rtl92e_config_rf_path(struct net_device *dev, enum rf90_radio_path eRFPath)
			rtl92e_set_rf_reg(dev, eRFPath, RTL8192E_RADIO_A_ARR[i],
					  bMask12Bits,
					  RTL8192E_RADIO_A_ARR[i + 1]);

		}
		break;
	case RF90_PATH_B:
@@ -495,7 +485,6 @@ u8 rtl92e_config_rf_path(struct net_device *dev, enum rf90_radio_path eRFPath)
			rtl92e_set_rf_reg(dev, eRFPath, RTL8192E_RADIO_B_ARR[i],
					  bMask12Bits,
					  RTL8192E_RADIO_B_ARR[i + 1]);

		}
		break;
	default:
@@ -503,7 +492,6 @@ u8 rtl92e_config_rf_path(struct net_device *dev, enum rf90_radio_path eRFPath)
	}

	return 0;

}

static void _rtl92e_set_tx_power_level(struct net_device *dev, u8 channel)
@@ -677,7 +665,6 @@ static void _rtl92e_phy_switch_channel(struct net_device *dev, u8 channel)

static void _rtl92e_phy_switch_channel_work_item(struct net_device *dev)
{

	struct r8192_priv *priv = rtllib_priv(dev);

	_rtl92e_phy_switch_channel(dev, priv->chan);
@@ -694,7 +681,6 @@ u8 rtl92e_set_channel(struct net_device *dev, u8 channel)
	if (priv->sw_chnl_in_progress)
		return false;


	switch (priv->rtllib->mode) {
	case WIRELESS_MODE_B:
		if (channel > 14) {
@@ -824,7 +810,6 @@ static void _rtl92e_cck_tx_power_track_bw_switch(struct net_device *dev)

static void _rtl92e_set_bw_mode_work_item(struct net_device *dev)
{

	struct r8192_priv *priv = rtllib_priv(dev);
	u8 regBwOpMode;

@@ -890,7 +875,6 @@ static void _rtl92e_set_bw_mode_work_item(struct net_device *dev)
		netdev_err(dev, "%s(): unknown Bandwidth: %#X\n", __func__,
			   priv->current_chnl_bw);
		break;

	}

	rtl92e_set_bandwidth(dev, priv->current_chnl_bw);
@@ -904,7 +888,6 @@ void rtl92e_set_bw_mode(struct net_device *dev, enum ht_channel_width bandwidth,
{
	struct r8192_priv *priv = rtllib_priv(dev);


	if (priv->set_bw_mode_in_progress)
		return;

@@ -921,7 +904,6 @@ void rtl92e_set_bw_mode(struct net_device *dev, enum ht_channel_width bandwidth,
		priv->n_cur_40mhz_prime_sc = HAL_PRIME_CHNL_OFFSET_DONT_CARE;

	_rtl92e_set_bw_mode_work_item(dev);

}

void rtl92e_init_gain(struct net_device *dev, u8 Operation)
@@ -993,7 +975,6 @@ void rtl92e_init_gain(struct net_device *dev, u8 Operation)

void rtl92e_set_rf_off(struct net_device *dev)
{

	rtl92e_set_bb_reg(dev, rFPGA0_XA_RFInterfaceOE, BIT4, 0x0);
	rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0x300, 0x0);
	rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0);
@@ -1002,7 +983,6 @@ void rtl92e_set_rf_off(struct net_device *dev)
	rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0);
	rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter1, 0x4, 0x0);
	rtl92e_writeb(dev, ANAPAR_FOR_8192PCIE, 0x07);

}

static bool _rtl92e_set_rf_power_state(struct net_device *dev,
+0 −4
Original line number Diff line number Diff line
@@ -7,7 +7,6 @@
#ifndef _R819XU_PHYREG_H
#define _R819XU_PHYREG_H


#define RF_DATA			0x1d4

#define rPMAC_Reset		0x100
@@ -125,7 +124,6 @@
#define rOFDM0_TxCoeff5			0xcb4
#define rOFDM0_TxCoeff6			0xcb8


#define rOFDM1_LSTF			0xd00
#define rOFDM1_TRxPathEnable		0xd04
#define rOFDM1_CFO			0xd08
@@ -163,7 +161,6 @@
#define rTxAGC_Mcs11_Mcs08		0xe18
#define rTxAGC_Mcs15_Mcs12		0xe1c


#define rZebra1_HSSIEnable		0x0
#define rZebra1_TRxEnable1		0x1
#define rZebra1_TRxEnable2		0x2
@@ -819,7 +816,6 @@
#define bOFDMPHY0_End	0xcff
#define bOFDMPHY1_End	0xdff


#define bPMACControl	0x0
#define bWMACControl	0x1
#define bWNICControl	0x2
+0 −2
Original line number Diff line number Diff line
@@ -101,7 +101,6 @@ void rtl92e_set_key(struct net_device *dev, u8 EntryNo, u8 KeyIndex,
	else
		usConfig |= BIT15 | (KeyType << 2) | KeyIndex;


	for (i = 0; i < CAM_CONTENT_COUNT; i++) {
		TargetCommand  = i + CAM_CONTENT_COUNT * EntryNo;
		TargetCommand |= BIT31 | BIT16;
@@ -149,7 +148,6 @@ void rtl92e_cam_restore(struct net_device *dev)

	if ((priv->rtllib->pairwise_key_type == KEY_TYPE_WEP40) ||
	    (priv->rtllib->pairwise_key_type == KEY_TYPE_WEP104)) {

		for (EntryId = 0; EntryId < 4; EntryId++) {
			MacAddr = CAM_CONST_ADDR[EntryId];
			if (priv->rtllib->swcamtable[EntryId].bused) {
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