Commit c9072f11 authored by Lorenzo Bianconi's avatar Lorenzo Bianconi Committed by Felix Fietkau
Browse files

wifi: mt76: mt792x: introduce mt792x_irq_map 



mt792x_irq_map will be use to share the irq code shared between mt7921
and mt7925

Signed-off-by: default avatarLorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: default avatarDeren Wu <deren.wu@mediatek.com>
Signed-off-by: default avatarFelix Fietkau <nbd@nbd.name>
parent e8a264cc

drivers/net/wireless/mediatek/mt76/mt7921/dma.c

+5 −4
Original line number Diff line number Diff line
@@ -19,7 +19,8 @@ static int mt7921_poll_tx(struct napi_struct *napi, int budget) 


	mt76_connac_tx_cleanup(&dev->mt76);

	if (napi_complete(napi))

		mt76_connac_irq_enable(&dev->mt76, MT_INT_TX_DONE_ALL);

		mt76_connac_irq_enable(&dev->mt76,

				       dev->irq_map->tx.all_complete_mask);

	mt76_connac_pm_unref(&dev->mphy, &dev->pm);



	return 0;
@@ -72,8 +73,8 @@ static int mt7921_dma_enable(struct mt792x_dev *dev) 


	/* enable interrupts for TX/RX rings */

	mt76_connac_irq_enable(&dev->mt76,

			       MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |

			       MT_INT_MCU_CMD);

			       dev->irq_map->tx.all_complete_mask |

			       MT_INT_RX_DONE_ALL | MT_INT_MCU_CMD);

	mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE);



	return 0;
@@ -139,7 +140,7 @@ int mt7921_wpdma_reinit_cond(struct mt792x_dev *dev) 
	/* check if the wpdma must be reinitialized */

	if (mt792x_dma_need_reinit(dev)) {

		/* disable interrutpts */

		mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);

		mt76_wr(dev, dev->irq_map->host_irq_enable, 0);

		mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0);



		err = mt7921_wpdma_reset(dev, false);

drivers/net/wireless/mediatek/mt76/mt7921/pci.c

+35 −18
Original line number Diff line number Diff line
@@ -31,19 +31,22 @@ MODULE_PARM_DESC(disable_aspm, "disable PCI ASPM support"); 
static void

mt7921_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)

{

	struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);

	const struct mt792x_irq_map *irq_map = dev->irq_map;



	if (q == MT_RXQ_MAIN)

		mt76_connac_irq_enable(mdev, MT_INT_RX_DONE_DATA);

		mt76_connac_irq_enable(mdev, irq_map->rx.data_complete_mask);

	else if (q == MT_RXQ_MCU_WA)

		mt76_connac_irq_enable(mdev, MT_INT_RX_DONE_WM2);

		mt76_connac_irq_enable(mdev, irq_map->rx.wm2_complete_mask);

	else

		mt76_connac_irq_enable(mdev, MT_INT_RX_DONE_WM);

		mt76_connac_irq_enable(mdev, irq_map->rx.wm_complete_mask);

}



static irqreturn_t mt7921_irq_handler(int irq, void *dev_instance)

{

	struct mt792x_dev *dev = dev_instance;



	mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);

	mt76_wr(dev, dev->irq_map->host_irq_enable, 0);



	if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))

		return IRQ_NONE;
@@ -56,9 +59,10 @@ static irqreturn_t mt7921_irq_handler(int irq, void *dev_instance) 
static void mt7921_irq_tasklet(unsigned long data)

{

	struct mt792x_dev *dev = (struct mt792x_dev *)data;

	const struct mt792x_irq_map *irq_map = dev->irq_map;

	u32 intr, mask = 0;



	mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);

	mt76_wr(dev, irq_map->host_irq_enable, 0);



	intr = mt76_rr(dev, MT_WFDMA0_HOST_INT_STA);

	intr &= dev->mt76.mmio.irqmask;
@@ -67,8 +71,8 @@ static void mt7921_irq_tasklet(unsigned long data) 
	trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);



	mask |= intr & MT_INT_RX_DONE_ALL;

	if (intr & MT_INT_TX_DONE_MCU)

		mask |= MT_INT_TX_DONE_MCU;

	if (intr & irq_map->tx.mcu_complete_mask)

		mask |= irq_map->tx.mcu_complete_mask;



	if (intr & MT_INT_MCU_CMD) {

		u32 intr_sw;
@@ -77,23 +81,23 @@ static void mt7921_irq_tasklet(unsigned long data) 
		/* ack MCU2HOST_SW_INT_STA */

		mt76_wr(dev, MT_MCU_CMD, intr_sw);

		if (intr_sw & MT_MCU_CMD_WAKE_RX_PCIE) {

			mask |= MT_INT_RX_DONE_DATA;

			intr |= MT_INT_RX_DONE_DATA;

			mask |= irq_map->rx.data_complete_mask;

			intr |= irq_map->rx.data_complete_mask;

		}

	}



	mt76_set_irq_mask(&dev->mt76, MT_WFDMA0_HOST_INT_ENA, mask, 0);

	mt76_set_irq_mask(&dev->mt76, irq_map->host_irq_enable, mask, 0);



	if (intr & MT_INT_TX_DONE_ALL)

	if (intr & irq_map->tx.all_complete_mask)

		napi_schedule(&dev->mt76.tx_napi);



	if (intr & MT_INT_RX_DONE_WM)

	if (intr & irq_map->rx.wm_complete_mask)

		napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]);



	if (intr & MT_INT_RX_DONE_WM2)

	if (intr & irq_map->rx.wm2_complete_mask)

		napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]);



	if (intr & MT_INT_RX_DONE_DATA)

	if (intr & irq_map->rx.data_complete_mask)

		napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]);

}
@@ -254,6 +258,18 @@ static int mt7921_pci_probe(struct pci_dev *pdev, 
		.drv_own = mt7921e_mcu_drv_pmctrl,

		.fw_own = mt7921e_mcu_fw_pmctrl,

	};

	static const struct mt792x_irq_map irq_map = {

		.host_irq_enable = MT_WFDMA0_HOST_INT_ENA,

		.tx = {

			.all_complete_mask = MT_INT_TX_DONE_ALL,

			.mcu_complete_mask = MT_INT_TX_DONE_MCU,

		},

		.rx = {

			.data_complete_mask = MT_INT_RX_DONE_DATA,

			.wm_complete_mask = MT_INT_RX_DONE_WM,

			.wm2_complete_mask = MT_INT_RX_DONE_WM2,

		},

	};

	struct ieee80211_ops *ops;

	struct mt76_bus_ops *bus_ops;

	struct mt792x_dev *dev;
@@ -306,6 +322,7 @@ static int mt7921_pci_probe(struct pci_dev *pdev, 
	dev = container_of(mdev, struct mt792x_dev, mt76);

	dev->fw_features = features;

	dev->hif_ops = &mt7921_pcie_ops;

	dev->irq_map = &irq_map;

	mt76_mmio_init(&dev->mt76, pcim_iomap_table(pdev)[0]);

	tasklet_init(&mdev->irq_tasklet, mt7921_irq_tasklet, (unsigned long)dev);
@@ -341,7 +358,7 @@ static int mt7921_pci_probe(struct pci_dev *pdev, 
	if (ret)

		goto err_free_dev;



	mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);

	mt76_wr(dev, irq_map.host_irq_enable, 0);



	mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);
@@ -424,7 +441,7 @@ static int mt7921_pci_suspend(struct device *device) 
		   MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN);



	/* disable interrupt */

	mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);

	mt76_wr(dev, dev->irq_map->host_irq_enable, 0);

	mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0);

	synchronize_irq(pdev->irq);

	tasklet_kill(&mdev->irq_tasklet);
@@ -472,8 +489,8 @@ static int mt7921_pci_resume(struct device *device) 
	/* enable interrupt */

	mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);

	mt76_connac_irq_enable(&dev->mt76,

			       MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |

			       MT_INT_MCU_CMD);

			       dev->irq_map->tx.all_complete_mask |

			       MT_INT_RX_DONE_ALL | MT_INT_MCU_CMD);

	mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE);



	/* put dma enabled */

drivers/net/wireless/mediatek/mt76/mt7921/pci_mac.c

+4 −4
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@ int mt7921e_mac_reset(struct mt792x_dev *dev) 


	mt76_connac_free_pending_tx_skbs(&dev->pm, NULL);



	mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);

	mt76_wr(dev, dev->irq_map->host_irq_enable, 0);

	mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0);



	set_bit(MT76_RESET, &dev->mphy.state);
@@ -92,9 +92,9 @@ int mt7921e_mac_reset(struct mt792x_dev *dev) 
	dev->fw_assert = false;

	clear_bit(MT76_MCU_RESET, &dev->mphy.state);



	mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA,

		MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |

		MT_INT_MCU_CMD);

	mt76_wr(dev, dev->irq_map->host_irq_enable,

		dev->irq_map->tx.all_complete_mask |

		MT_INT_RX_DONE_ALL | MT_INT_MCU_CMD);

	mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);



	err = mt7921e_driver_own(dev);

drivers/net/wireless/mediatek/mt76/mt7921/regs.h

+0 −17
Original line number Diff line number Diff line
@@ -29,18 +29,6 @@ 
#define MT_MDP_TO_WM			1



#define MT_WFDMA0_HOST_INT_ENA		MT_WFDMA0(0x204)

#define HOST_RX_DONE_INT_ENA0		BIT(0)

#define HOST_RX_DONE_INT_ENA1		BIT(1)

#define HOST_RX_DONE_INT_ENA2		BIT(2)

#define HOST_RX_DONE_INT_ENA3		BIT(3)

#define HOST_TX_DONE_INT_ENA0		BIT(4)

#define HOST_TX_DONE_INT_ENA1		BIT(5)

#define HOST_TX_DONE_INT_ENA2		BIT(6)

#define HOST_TX_DONE_INT_ENA3		BIT(7)

#define HOST_TX_DONE_INT_ENA4		BIT(8)

#define HOST_TX_DONE_INT_ENA5		BIT(9)

#define HOST_TX_DONE_INT_ENA6		BIT(10)

#define HOST_TX_DONE_INT_ENA7		BIT(11)

#define HOST_TX_DONE_INT_ENA8		BIT(12)

#define HOST_TX_DONE_INT_ENA9		BIT(13)

#define HOST_TX_DONE_INT_ENA10		BIT(14)
@@ -48,14 +36,10 @@ 
#define HOST_TX_DONE_INT_ENA12		BIT(16)

#define HOST_TX_DONE_INT_ENA13		BIT(17)

#define HOST_TX_DONE_INT_ENA14		BIT(18)

#define HOST_RX_COHERENT_EN		BIT(20)

#define HOST_TX_COHERENT_EN		BIT(21)

#define HOST_RX_DONE_INT_ENA4		BIT(22)

#define HOST_RX_DONE_INT_ENA5		BIT(23)

#define HOST_TX_DONE_INT_ENA16		BIT(26)

#define HOST_TX_DONE_INT_ENA17		BIT(27)

#define MCU2HOST_SW_INT_ENA		BIT(29)

#define HOST_TX_DONE_INT_ENA18		BIT(30)



/* WFDMA interrupt */

#define MT_INT_RX_DONE_DATA		HOST_RX_DONE_INT_ENA2
@@ -67,7 +51,6 @@ 
#define MT_INT_TX_DONE_MCU_WM		HOST_TX_DONE_INT_ENA17

#define MT_INT_TX_DONE_FWDL		HOST_TX_DONE_INT_ENA16

#define MT_INT_TX_DONE_BAND0		HOST_TX_DONE_INT_ENA0

#define MT_INT_MCU_CMD			MCU2HOST_SW_INT_ENA



#define MT_INT_TX_DONE_MCU		(MT_INT_TX_DONE_MCU_WM |	\

					 MT_INT_TX_DONE_FWDL)

drivers/net/wireless/mediatek/mt76/mt792x.h

+14 −0
Original line number Diff line number Diff line
@@ -114,6 +114,19 @@ struct mt792x_phy { 
	bool roc_grant;

};



struct mt792x_irq_map {

	u32 host_irq_enable;

	struct {

		u32 all_complete_mask;

		u32 mcu_complete_mask;

	} tx;

	struct {

		u32 data_complete_mask;

		u32 wm_complete_mask;

		u32 wm2_complete_mask;

	} rx;

};



struct mt792x_hif_ops {

	int (*init_reset)(struct mt792x_dev *dev);

	int (*reset)(struct mt792x_dev *dev);
@@ -145,6 +158,7 @@ struct mt792x_dev { 
	struct mt76_connac_pm pm;

	struct mt76_connac_coredump coredump;

	const struct mt792x_hif_ops *hif_ops;

	const struct mt792x_irq_map *irq_map;



	struct work_struct ipv6_ns_work;

	/* IPv6 addresses for WoWLAN */