Loading drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c +1 −1 Original line number Diff line number Diff line Loading @@ -247,7 +247,7 @@ nv04_fifo_ofuncs = { static struct nouveau_oclass nv04_fifo_sclass[] = { { 0x006b, &nv04_fifo_ofuncs }, { NV03_CHANNEL_DMA_CLASS, &nv04_fifo_ofuncs }, {} }; Loading drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c +1 −1 Original line number Diff line number Diff line Loading @@ -106,7 +106,7 @@ nv10_fifo_ofuncs = { static struct nouveau_oclass nv10_fifo_sclass[] = { { 0x006e, &nv10_fifo_ofuncs }, { NV10_CHANNEL_DMA_CLASS, &nv10_fifo_ofuncs }, {} }; Loading drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c +1 −1 Original line number Diff line number Diff line Loading @@ -113,7 +113,7 @@ nv17_fifo_ofuncs = { static struct nouveau_oclass nv17_fifo_sclass[] = { { 0x176e, &nv17_fifo_ofuncs }, { NV17_CHANNEL_DMA_CLASS, &nv17_fifo_ofuncs }, {} }; Loading drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c +1 −1 Original line number Diff line number Diff line Loading @@ -232,7 +232,7 @@ nv40_fifo_ofuncs = { static struct nouveau_oclass nv40_fifo_sclass[] = { { 0x406e, &nv40_fifo_ofuncs }, { NV40_CHANNEL_DMA_CLASS, &nv40_fifo_ofuncs }, {} }; Loading drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c +2 −2 Original line number Diff line number Diff line Loading @@ -346,8 +346,8 @@ nv50_fifo_ofuncs_ind = { static struct nouveau_oclass nv50_fifo_sclass[] = { { 0x506e, &nv50_fifo_ofuncs_dma }, { 0x506f, &nv50_fifo_ofuncs_ind }, { NV50_CHANNEL_DMA_CLASS, &nv50_fifo_ofuncs_dma }, { NV50_CHANNEL_IND_CLASS, &nv50_fifo_ofuncs_ind }, {} }; Loading Loading
drivers/gpu/drm/nouveau/core/engine/fifo/nv04.c +1 −1 Original line number Diff line number Diff line Loading @@ -247,7 +247,7 @@ nv04_fifo_ofuncs = { static struct nouveau_oclass nv04_fifo_sclass[] = { { 0x006b, &nv04_fifo_ofuncs }, { NV03_CHANNEL_DMA_CLASS, &nv04_fifo_ofuncs }, {} }; Loading
drivers/gpu/drm/nouveau/core/engine/fifo/nv10.c +1 −1 Original line number Diff line number Diff line Loading @@ -106,7 +106,7 @@ nv10_fifo_ofuncs = { static struct nouveau_oclass nv10_fifo_sclass[] = { { 0x006e, &nv10_fifo_ofuncs }, { NV10_CHANNEL_DMA_CLASS, &nv10_fifo_ofuncs }, {} }; Loading
drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c +1 −1 Original line number Diff line number Diff line Loading @@ -113,7 +113,7 @@ nv17_fifo_ofuncs = { static struct nouveau_oclass nv17_fifo_sclass[] = { { 0x176e, &nv17_fifo_ofuncs }, { NV17_CHANNEL_DMA_CLASS, &nv17_fifo_ofuncs }, {} }; Loading
drivers/gpu/drm/nouveau/core/engine/fifo/nv40.c +1 −1 Original line number Diff line number Diff line Loading @@ -232,7 +232,7 @@ nv40_fifo_ofuncs = { static struct nouveau_oclass nv40_fifo_sclass[] = { { 0x406e, &nv40_fifo_ofuncs }, { NV40_CHANNEL_DMA_CLASS, &nv40_fifo_ofuncs }, {} }; Loading
drivers/gpu/drm/nouveau/core/engine/fifo/nv50.c +2 −2 Original line number Diff line number Diff line Loading @@ -346,8 +346,8 @@ nv50_fifo_ofuncs_ind = { static struct nouveau_oclass nv50_fifo_sclass[] = { { 0x506e, &nv50_fifo_ofuncs_dma }, { 0x506f, &nv50_fifo_ofuncs_ind }, { NV50_CHANNEL_DMA_CLASS, &nv50_fifo_ofuncs_dma }, { NV50_CHANNEL_IND_CLASS, &nv50_fifo_ofuncs_ind }, {} }; Loading