Unverified Commit c9c50dfd authored by Kunihiko Hayashi's avatar Kunihiko Hayashi Committed by Arnd Bergmann
Browse files

ARM: dts: uniphier: Use GIC interrupt definitions



Use human-readable definitions for GIC interrupt type and flag, instead of
hard-coding the numbers. No functional change.

Signed-off-by: default avatarKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042249.4708-6-hayashi.kunihiko@socionext.com

'
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 888c7017
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+2 −2
Original line number Diff line number Diff line
@@ -36,11 +36,11 @@ memory@80000000 {
};

&ethsc {
	interrupts = <1 8>;
	interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
};

&serialsc {
	interrupts = <1 8>;
	interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
};

&serial0 {
+29 −20
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@
//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>

#include <dt-bindings/gpio/uniphier-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	compatible = "socionext,uniphier-ld4";
@@ -55,7 +56,8 @@ l2: cache-controller@500c0000 {
			compatible = "socionext,uniphier-system-cache";
			reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
			      <0x506c0000 0x400>;
			interrupts = <0 174 4>, <0 175 4>;
			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
			cache-unified;
			cache-size = <(512 * 1024)>;
			cache-sets = <256>;
@@ -69,7 +71,7 @@ spi: spi@54006000 {
			reg = <0x54006000 0x100>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0 39 4>;
			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_spi0>;
			clocks = <&peri_clk 11>;
@@ -80,7 +82,7 @@ serial0: serial@54006800 {
			compatible = "socionext,uniphier-uart";
			status = "disabled";
			reg = <0x54006800 0x40>;
			interrupts = <0 33 4>;
			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_uart0>;
			clocks = <&peri_clk 0>;
@@ -91,7 +93,7 @@ serial1: serial@54006900 {
			compatible = "socionext,uniphier-uart";
			status = "disabled";
			reg = <0x54006900 0x40>;
			interrupts = <0 35 4>;
			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_uart1>;
			clocks = <&peri_clk 1>;
@@ -102,7 +104,7 @@ serial2: serial@54006a00 {
			compatible = "socionext,uniphier-uart";
			status = "disabled";
			reg = <0x54006a00 0x40>;
			interrupts = <0 37 4>;
			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_uart2>;
			clocks = <&peri_clk 2>;
@@ -113,7 +115,7 @@ serial3: serial@54006b00 {
			compatible = "socionext,uniphier-uart";
			status = "disabled";
			reg = <0x54006b00 0x40>;
			interrupts = <0 29 4>;
			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_uart3>;
			clocks = <&peri_clk 3>;
@@ -140,7 +142,7 @@ i2c0: i2c@58400000 {
			reg = <0x58400000 0x40>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0 41 1>;
			interrupts = <GIC_SPI 41 IRQ_TYPE_EDGE_RISING>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_i2c0>;
			clocks = <&peri_clk 4>;
@@ -154,7 +156,7 @@ i2c1: i2c@58480000 {
			reg = <0x58480000 0x40>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0 42 1>;
			interrupts = <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_i2c1>;
			clocks = <&peri_clk 5>;
@@ -168,7 +170,7 @@ i2c2: i2c@58500000 {
			reg = <0x58500000 0x40>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0 43 1>;
			interrupts = <GIC_SPI 43 IRQ_TYPE_EDGE_RISING>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_i2c2>;
			clocks = <&peri_clk 6>;
@@ -182,7 +184,7 @@ i2c3: i2c@58580000 {
			reg = <0x58580000 0x40>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0 44 1>;
			interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_i2c3>;
			clocks = <&peri_clk 7>;
@@ -240,8 +242,13 @@ peri_rst: reset {
		dmac: dma-controller@5a000000 {
			compatible = "socionext,uniphier-mio-dmac";
			reg = <0x5a000000 0x1000>;
			interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>,
				     <0 71 4>, <0 72 4>, <0 73 4>;
			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&mio_clk 7>;
			resets = <&mio_rst 7>;
			#dma-cells = <1>;
@@ -251,7 +258,7 @@ sd: mmc@5a400000 {
			compatible = "socionext,uniphier-sd-v2.91";
			status = "disabled";
			reg = <0x5a400000 0x200>;
			interrupts = <0 76 4>;
			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default", "uhs";
			pinctrl-0 = <&pinctrl_sd>;
			pinctrl-1 = <&pinctrl_sd_uhs>;
@@ -271,7 +278,7 @@ emmc: mmc@5a500000 {
			compatible = "socionext,uniphier-sd-v2.91";
			status = "disabled";
			reg = <0x5a500000 0x200>;
			interrupts = <0 78 4>;
			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_emmc>;
			clocks = <&mio_clk 1>;
@@ -289,7 +296,7 @@ usb0: usb@5a800100 {
			compatible = "socionext,uniphier-ehci", "generic-ehci";
			status = "disabled";
			reg = <0x5a800100 0x100>;
			interrupts = <0 80 4>;
			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usb0>;
			clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
@@ -303,7 +310,7 @@ usb1: usb@5a810100 {
			compatible = "socionext,uniphier-ehci", "generic-ehci";
			status = "disabled";
			reg = <0x5a810100 0x100>;
			interrupts = <0 81 4>;
			interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usb1>;
			clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
@@ -317,7 +324,7 @@ usb2: usb@5a820100 {
			compatible = "socionext,uniphier-ehci", "generic-ehci";
			status = "disabled";
			reg = <0x5a820100 0x100>;
			interrupts = <0 82 4>;
			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usb2>;
			clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>,
@@ -358,14 +365,16 @@ efuse@130 {
		timer@60000200 {
			compatible = "arm,cortex-a9-global-timer";
			reg = <0x60000200 0x20>;
			interrupts = <1 11 0x104>;
			interrupts = <GIC_PPI 11
				(GIC_CPU_MASK_RAW(1) | IRQ_TYPE_LEVEL_HIGH)>;
			clocks = <&arm_timer_clk>;
		};

		timer@60000600 {
			compatible = "arm,cortex-a9-twd-timer";
			reg = <0x60000600 0x20>;
			interrupts = <1 13 0x104>;
			interrupts = <GIC_PPI 13
				(GIC_CPU_MASK_RAW(1) | IRQ_TYPE_LEVEL_HIGH)>;
			clocks = <&arm_timer_clk>;
		};

@@ -407,7 +416,7 @@ nand: nand-controller@68000000 {
			reg = <0x68000000 0x20>, <0x68100000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0 65 4>;
			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
			clock-names = "nand", "nand_x", "ecc";
+2 −2
Original line number Diff line number Diff line
@@ -40,11 +40,11 @@ memory@80000000 {
};

&ethsc {
	interrupts = <4 8>;
	interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
};

&serialsc {
	interrupts = <4 8>;
	interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
};

&serial0 {
+2 −2
Original line number Diff line number Diff line
@@ -39,11 +39,11 @@ memory@80000000 {
};

&ethsc {
	interrupts = <2 8>;
	interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
};

&serialsc {
	interrupts = <2 8>;
	interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
};

&serial0 {
+38 −26
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@
//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>

#include <dt-bindings/gpio/uniphier-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	compatible = "socionext,uniphier-pro4";
@@ -63,7 +64,8 @@ l2: cache-controller@500c0000 {
			compatible = "socionext,uniphier-system-cache";
			reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
			      <0x506c0000 0x400>;
			interrupts = <0 174 4>, <0 175 4>;
			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
			cache-unified;
			cache-size = <(768 * 1024)>;
			cache-sets = <256>;
@@ -77,7 +79,7 @@ spi0: spi@54006000 {
			reg = <0x54006000 0x100>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0 39 4>;
			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_spi0>;
			clocks = <&peri_clk 11>;
@@ -88,7 +90,7 @@ serial0: serial@54006800 {
			compatible = "socionext,uniphier-uart";
			status = "disabled";
			reg = <0x54006800 0x40>;
			interrupts = <0 33 4>;
			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_uart0>;
			clocks = <&peri_clk 0>;
@@ -99,7 +101,7 @@ serial1: serial@54006900 {
			compatible = "socionext,uniphier-uart";
			status = "disabled";
			reg = <0x54006900 0x40>;
			interrupts = <0 35 4>;
			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_uart1>;
			clocks = <&peri_clk 1>;
@@ -110,7 +112,7 @@ serial2: serial@54006a00 {
			compatible = "socionext,uniphier-uart";
			status = "disabled";
			reg = <0x54006a00 0x40>;
			interrupts = <0 37 4>;
			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_uart2>;
			clocks = <&peri_clk 2>;
@@ -121,7 +123,7 @@ serial3: serial@54006b00 {
			compatible = "socionext,uniphier-uart";
			status = "disabled";
			reg = <0x54006b00 0x40>;
			interrupts = <0 177 4>;
			interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_uart3>;
			clocks = <&peri_clk 3>;
@@ -148,7 +150,7 @@ i2c0: i2c@58780000 {
			reg = <0x58780000 0x80>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0 41 4>;
			interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_i2c0>;
			clocks = <&peri_clk 4>;
@@ -162,7 +164,7 @@ i2c1: i2c@58781000 {
			reg = <0x58781000 0x80>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0 42 4>;
			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_i2c1>;
			clocks = <&peri_clk 5>;
@@ -176,7 +178,7 @@ i2c2: i2c@58782000 {
			reg = <0x58782000 0x80>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0 43 4>;
			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_i2c2>;
			clocks = <&peri_clk 6>;
@@ -190,7 +192,7 @@ i2c3: i2c@58783000 {
			reg = <0x58783000 0x80>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0 44 4>;
			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_i2c3>;
			clocks = <&peri_clk 7>;
@@ -206,7 +208,7 @@ i2c5: i2c@58785000 {
			reg = <0x58785000 0x80>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0 25 4>;
			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&peri_clk 9>;
			resets = <&peri_rst 9>;
			clock-frequency = <400000>;
@@ -218,7 +220,7 @@ i2c6: i2c@58786000 {
			reg = <0x58786000 0x80>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0 26 4>;
			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&peri_clk 10>;
			resets = <&peri_rst 10>;
			clock-frequency = <400000>;
@@ -274,8 +276,14 @@ peri_rst: reset {
		dmac: dma-controller@5a000000 {
			compatible = "socionext,uniphier-mio-dmac";
			reg = <0x5a000000 0x1000>;
			interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>,
				     <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>;
			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&mio_clk 7>;
			resets = <&mio_rst 7>;
			#dma-cells = <1>;
@@ -285,7 +293,7 @@ sd: mmc@5a400000 {
			compatible = "socionext,uniphier-sd-v2.91";
			status = "disabled";
			reg = <0x5a400000 0x200>;
			interrupts = <0 76 4>;
			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default", "uhs";
			pinctrl-0 = <&pinctrl_sd>;
			pinctrl-1 = <&pinctrl_sd_uhs>;
@@ -305,7 +313,7 @@ emmc: mmc@5a500000 {
			compatible = "socionext,uniphier-sd-v2.91";
			status = "disabled";
			reg = <0x5a500000 0x200>;
			interrupts = <0 78 4>;
			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_emmc>;
			clocks = <&mio_clk 1>;
@@ -323,7 +331,7 @@ sd1: mmc@5a600000 {
			compatible = "socionext,uniphier-sd-v2.91";
			status = "disabled";
			reg = <0x5a600000 0x200>;
			interrupts = <0 85 4>;
			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_sd1>;
			clocks = <&mio_clk 2>;
@@ -339,7 +347,7 @@ usb2: usb@5a800100 {
			compatible = "socionext,uniphier-ehci", "generic-ehci";
			status = "disabled";
			reg = <0x5a800100 0x100>;
			interrupts = <0 80 4>;
			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usb2>;
			clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
@@ -355,7 +363,7 @@ usb3: usb@5a810100 {
			compatible = "socionext,uniphier-ehci", "generic-ehci";
			status = "disabled";
			reg = <0x5a810100 0x100>;
			interrupts = <0 81 4>;
			interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usb3>;
			clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
@@ -431,7 +439,7 @@ efuse@200 {
		xdmac: dma-controller@5fc10000 {
			compatible = "socionext,uniphier-xdmac";
			reg = <0x5fc10000 0x5300>;
			interrupts = <0 188 4>;
			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
			dma-channels = <16>;
			#dma-cells = <2>;
		};
@@ -446,14 +454,16 @@ aidet: interrupt-controller@5fc20000 {
		timer@60000200 {
			compatible = "arm,cortex-a9-global-timer";
			reg = <0x60000200 0x20>;
			interrupts = <1 11 0x304>;
			interrupts = <GIC_PPI 11
				(GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
			clocks = <&arm_timer_clk>;
		};

		timer@60000600 {
			compatible = "arm,cortex-a9-twd-timer";
			reg = <0x60000600 0x20>;
			interrupts = <1 13 0x304>;
			interrupts = <GIC_PPI 13
				(GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
			clocks = <&arm_timer_clk>;
		};

@@ -485,7 +495,7 @@ eth: ethernet@65000000 {
			compatible = "socionext,uniphier-pro4-ave4";
			status = "disabled";
			reg = <0x65000000 0x8500>;
			interrupts = <0 66 4>;
			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_ether_rgmii>;
			clock-names = "gio", "ether", "ether-gb", "ether-phy";
@@ -508,7 +518,8 @@ usb0: usb@65a00000 {
			status = "disabled";
			reg = <0x65a00000 0xcd00>;
			interrupt-names = "host", "peripheral";
			interrupts = <0 134 4>, <0 135 4>;
			interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usb0>;
			clock-names = "ref", "bus_early", "suspend";
@@ -561,7 +572,8 @@ usb1: usb@65c00000 {
			status = "disabled";
			reg = <0x65c00000 0xcd00>;
			interrupt-names = "host", "peripheral";
			interrupts = <0 137 4>, <0 138 4>;
			interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usb1>;
			clock-names = "ref", "bus_early", "suspend";
@@ -605,7 +617,7 @@ nand: nand-controller@68000000 {
			reg = <0x68000000 0x20>, <0x68100000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupts = <0 65 4>;
			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_nand>;
			clock-names = "nand", "nand_x", "ecc";
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