Commit ca632f55 authored by Grant Likely's avatar Grant Likely
Browse files

spi: reorganize drivers 



Sort the SPI makefile and enforce the naming convention spi_*.c for
spi drivers.

This change also rolls the contents of atmel_spi.h into the .c file
since there is only one user of that particular include file.

v2: - Use 'spi-' prefix instead of 'spi_' to match what seems to be
      be the predominant pattern for subsystem prefixes.
    - Clean up filenames in Kconfig and header comment blocks

Signed-off-by: default avatarGrant Likely <grant.likely@secretlab.ca>
Acked-by: default avatarWolfram Sang <w.sang@pengutronix.de>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 8c992684

drivers/spi/Kconfig

+0 −18
Original line number Original line Diff line number Diff line
@@ -86,9 +86,6 @@ config SPI_BFIN_SPORT 
	help

	help

	  Enable support for a SPI bus via the Blackfin SPORT peripheral.

	  Enable support for a SPI bus via the Blackfin SPORT peripheral.





	  This driver can also be built as a module.  If so, the module

	  will be called spi_bfin_sport.



config SPI_AU1550

config SPI_AU1550

	tristate "Au1550/Au12x0 SPI Controller"

	tristate "Au1550/Au12x0 SPI Controller"

	depends on (SOC_AU1550 || SOC_AU1200) && EXPERIMENTAL

	depends on (SOC_AU1550 || SOC_AU1200) && EXPERIMENTAL
@@ -97,9 +94,6 @@ config SPI_AU1550 
	  If you say yes to this option, support will be included for the

	  If you say yes to this option, support will be included for the

	  Au1550 SPI controller (may also work with Au1200,Au1210,Au1250).

	  Au1550 SPI controller (may also work with Au1200,Au1210,Au1250).





	  This driver can also be built as a module.  If so, the module

	  will be called au1550_spi.



config SPI_BITBANG

config SPI_BITBANG

	tristate "Utilities for Bitbanging SPI masters"

	tristate "Utilities for Bitbanging SPI masters"

	help

	help
@@ -130,9 +124,6 @@ config SPI_COLDFIRE_QSPI 
	  This enables support for the Coldfire QSPI controller in master

	  This enables support for the Coldfire QSPI controller in master

	  mode.

	  mode.





	  This driver can also be built as a module.  If so, the module

	  will be called coldfire_qspi.



config SPI_DAVINCI

config SPI_DAVINCI

	tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller"

	tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller"

	depends on SPI_MASTER && ARCH_DAVINCI

	depends on SPI_MASTER && ARCH_DAVINCI
@@ -140,9 +131,6 @@ config SPI_DAVINCI 
	help

	help

	  SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules.

	  SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules.





	  This driver can also be built as a module. The module will be called

	  davinci_spi.



config SPI_EP93XX

config SPI_EP93XX

	tristate "Cirrus Logic EP93xx SPI controller"

	tristate "Cirrus Logic EP93xx SPI controller"

	depends on ARCH_EP93XX

	depends on ARCH_EP93XX
@@ -150,9 +138,6 @@ config SPI_EP93XX 
	  This enables using the Cirrus EP93xx SPI controller in master

	  This enables using the Cirrus EP93xx SPI controller in master

	  mode.

	  mode.





	  To compile this driver as a module, choose M here. The module will be

	  called ep93xx_spi.



config SPI_GPIO

config SPI_GPIO

	tristate "GPIO-based bitbanging SPI Master"

	tristate "GPIO-based bitbanging SPI Master"

	depends on GENERIC_GPIO

	depends on GENERIC_GPIO
@@ -385,9 +370,6 @@ config SPI_TI_SSP 
	  This selects an SPI master implementation using a TI sequencer

	  This selects an SPI master implementation using a TI sequencer

	  serial port.

	  serial port.





	  To compile this driver as a module, choose M here: the

	  module will be called ti-ssp-spi.



config SPI_TOPCLIFF_PCH

config SPI_TOPCLIFF_PCH

	tristate "Topcliff PCH SPI Controller"

	tristate "Topcliff PCH SPI Controller"

	depends on PCI

	depends on PCI

drivers/spi/Makefile

+50 −62
Original line number Original line Diff line number Diff line
@@ -7,68 +7,56 @@ ccflags-$(CONFIG_SPI_DEBUG) := -DDEBUG 
# small core, mostly translating board-specific

# small core, mostly translating board-specific

# config declarations into driver model code

# config declarations into driver model code

obj-$(CONFIG_SPI_MASTER)		+= spi.o

obj-$(CONFIG_SPI_MASTER)		+= spi.o



# SPI master controller drivers (bus)

obj-$(CONFIG_SPI_ALTERA)		+= spi_altera.o

obj-$(CONFIG_SPI_ATMEL)			+= atmel_spi.o

obj-$(CONFIG_SPI_ATH79)			+= ath79_spi.o

obj-$(CONFIG_SPI_BFIN)			+= spi_bfin5xx.o

obj-$(CONFIG_SPI_BFIN_SPORT)		+= spi_bfin_sport.o

obj-$(CONFIG_SPI_BITBANG)		+= spi_bitbang.o

obj-$(CONFIG_SPI_AU1550)		+= au1550_spi.o

obj-$(CONFIG_SPI_BUTTERFLY)		+= spi_butterfly.o

obj-$(CONFIG_SPI_COLDFIRE_QSPI)		+= coldfire_qspi.o

obj-$(CONFIG_SPI_DAVINCI)		+= davinci_spi.o

obj-$(CONFIG_SPI_DESIGNWARE)		+= dw_spi.o

obj-$(CONFIG_SPI_DW_PCI)		+= dw_spi_midpci.o

dw_spi_midpci-objs			:= dw_spi_pci.o dw_spi_mid.o

obj-$(CONFIG_SPI_DW_MMIO)		+= dw_spi_mmio.o

obj-$(CONFIG_SPI_EP93XX)		+= ep93xx_spi.o

obj-$(CONFIG_SPI_GPIO)			+= spi_gpio.o

obj-$(CONFIG_SPI_IMX)			+= spi_imx.o

obj-$(CONFIG_SPI_LM70_LLP)		+= spi_lm70llp.o

obj-$(CONFIG_SPI_PXA2XX)		+= pxa2xx_spi.o

obj-$(CONFIG_SPI_PXA2XX_PCI)		+= pxa2xx_spi_pci.o

obj-$(CONFIG_SPI_OC_TINY)		+= spi_oc_tiny.o

obj-$(CONFIG_SPI_OMAP_UWIRE)		+= omap_uwire.o

obj-$(CONFIG_SPI_OMAP24XX)		+= omap2_mcspi.o

obj-$(CONFIG_SPI_OMAP_100K)		+= omap_spi_100k.o

obj-$(CONFIG_SPI_ORION)			+= orion_spi.o

obj-$(CONFIG_SPI_PL022)			+= amba-pl022.o

obj-$(CONFIG_SPI_MPC512x_PSC)		+= mpc512x_psc_spi.o

obj-$(CONFIG_SPI_MPC52xx_PSC)		+= mpc52xx_psc_spi.o

obj-$(CONFIG_SPI_MPC52xx)		+= mpc52xx_spi.o

obj-$(CONFIG_SPI_FSL_LIB)		+= spi_fsl_lib.o

obj-$(CONFIG_SPI_FSL_ESPI)		+= spi_fsl_espi.o

obj-$(CONFIG_SPI_FSL_SPI)		+= spi_fsl_spi.o

obj-$(CONFIG_SPI_PPC4xx)		+= spi_ppc4xx.o

obj-$(CONFIG_SPI_S3C24XX_GPIO)		+= spi_s3c24xx_gpio.o

obj-$(CONFIG_SPI_S3C24XX)		+= spi_s3c24xx_hw.o

obj-$(CONFIG_SPI_S3C64XX)		+= spi_s3c64xx.o

obj-$(CONFIG_SPI_TEGRA)			+= spi_tegra.o

obj-$(CONFIG_SPI_TI_SSP)		+= ti-ssp-spi.o

obj-$(CONFIG_SPI_TOPCLIFF_PCH)		+= spi_topcliff_pch.o

obj-$(CONFIG_SPI_TXX9)			+= spi_txx9.o

obj-$(CONFIG_SPI_XILINX)		+= xilinx_spi.o

obj-$(CONFIG_SPI_SH)			+= spi_sh.o

obj-$(CONFIG_SPI_SH_SCI)		+= spi_sh_sci.o

obj-$(CONFIG_SPI_SH_MSIOF)		+= spi_sh_msiof.o

obj-$(CONFIG_SPI_STMP3XXX)		+= spi_stmp.o

obj-$(CONFIG_SPI_NUC900)		+= spi_nuc900.o



# special build for s3c24xx spi driver with fiq support

spi_s3c24xx_hw-y			:= spi_s3c24xx.o

spi_s3c24xx_hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi_s3c24xx_fiq.o



# 	... add above this line ...



# SPI protocol drivers (device/link on bus)

obj-$(CONFIG_SPI_SPIDEV)		+= spidev.o

obj-$(CONFIG_SPI_SPIDEV)		+= spidev.o

obj-$(CONFIG_SPI_TLE62X0)	+= tle62x0.o

# 	... add above this line ...





# SPI slave controller drivers (upstream link)

# SPI master controller drivers (bus)

# 	... add above this line ...

obj-$(CONFIG_SPI_ALTERA)		+= spi-altera.o

obj-$(CONFIG_SPI_ATMEL)			+= spi-atmel.o

obj-$(CONFIG_SPI_ATH79)			+= spi-ath79.o

obj-$(CONFIG_SPI_AU1550)		+= spi-au1550.o

obj-$(CONFIG_SPI_BFIN)			+= spi-bfin5xx.o

obj-$(CONFIG_SPI_BFIN_SPORT)		+= spi-bfin-sport.o

obj-$(CONFIG_SPI_BITBANG)		+= spi-bitbang.o

obj-$(CONFIG_SPI_BUTTERFLY)		+= spi-butterfly.o

obj-$(CONFIG_SPI_COLDFIRE_QSPI)		+= spi-coldfire-qspi.o

obj-$(CONFIG_SPI_DAVINCI)		+= spi-davinci.o

obj-$(CONFIG_SPI_DESIGNWARE)		+= spi-dw.o

obj-$(CONFIG_SPI_DW_MMIO)		+= spi-dw-mmio.o

obj-$(CONFIG_SPI_DW_PCI)		+= spi-dw-midpci.o

spi-dw-midpci-objs			:= spi-dw-pci.o spi-dw-mid.o

obj-$(CONFIG_SPI_EP93XX)		+= spi-ep93xx.o

obj-$(CONFIG_SPI_FSL_LIB)		+= spi-fsl-lib.o

obj-$(CONFIG_SPI_FSL_ESPI)		+= spi-fsl-espi.o

obj-$(CONFIG_SPI_FSL_SPI)		+= spi-fsl-spi.o

obj-$(CONFIG_SPI_GPIO)			+= spi-gpio.o

obj-$(CONFIG_SPI_IMX)			+= spi-imx.o

obj-$(CONFIG_SPI_LM70_LLP)		+= spi-lm70llp.o

obj-$(CONFIG_SPI_MPC512x_PSC)		+= spi-mpc512x-psc.o

obj-$(CONFIG_SPI_MPC52xx_PSC)		+= spi-mpc52xx-psc.o

obj-$(CONFIG_SPI_MPC52xx)		+= spi-mpc52xx.o

obj-$(CONFIG_SPI_NUC900)		+= spi-nuc900.o

obj-$(CONFIG_SPI_OC_TINY)		+= spi-oc-tiny.o

obj-$(CONFIG_SPI_OMAP_UWIRE)		+= spi-omap-uwire.o

obj-$(CONFIG_SPI_OMAP_100K)		+= spi-omap-100k.o

obj-$(CONFIG_SPI_OMAP24XX)		+= spi-omap2-mcspi.o

obj-$(CONFIG_SPI_ORION)			+= spi-orion.o

obj-$(CONFIG_SPI_PL022)			+= spi-pl022.o

obj-$(CONFIG_SPI_PPC4xx)		+= spi-ppc4xx.o

obj-$(CONFIG_SPI_PXA2XX)		+= spi-pxa2xx.o

obj-$(CONFIG_SPI_PXA2XX_PCI)		+= spi-pxa2xx-pci.o

obj-$(CONFIG_SPI_S3C24XX_GPIO)		+= spi-s3c24xx-gpio.o

obj-$(CONFIG_SPI_S3C24XX)		+= spi-s3c24xx-hw.o

spi-s3c24xx-hw-y			:= spi-s3c24xx.o

spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o

obj-$(CONFIG_SPI_S3C64XX)		+= spi-s3c64xx.o

obj-$(CONFIG_SPI_SH)			+= spi-sh.o

obj-$(CONFIG_SPI_SH_MSIOF)		+= spi-sh-msiof.o

obj-$(CONFIG_SPI_SH_SCI)		+= spi-sh-sci.o

obj-$(CONFIG_SPI_STMP3XXX)		+= spi-stmp.o

obj-$(CONFIG_SPI_TEGRA)			+= spi-tegra.o

obj-$(CONFIG_SPI_TI_SSP)		+= spi-ti-ssp.o

obj-$(CONFIG_SPI_TLE62X0)		+= spi-tle62x0.o

obj-$(CONFIG_SPI_TOPCLIFF_PCH)		+= spi-topcliff-pch.o

obj-$(CONFIG_SPI_TXX9)			+= spi-txx9.o

obj-$(CONFIG_SPI_XILINX)		+= spi-xilinx.o

# SPI slave drivers (protocol for that link)

# 	... add above this line ...

drivers/spi/atmel_spi.h

deleted100644 → 0
+0 −167
Original line number Original line Diff line number Diff line 
/*

 * Register definitions for Atmel Serial Peripheral Interface (SPI)

 *

 * Copyright (C) 2006 Atmel Corporation

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

#ifndef __ATMEL_SPI_H__

#define __ATMEL_SPI_H__



/* SPI register offsets */

#define SPI_CR					0x0000

#define SPI_MR					0x0004

#define SPI_RDR					0x0008

#define SPI_TDR					0x000c

#define SPI_SR					0x0010

#define SPI_IER					0x0014

#define SPI_IDR					0x0018

#define SPI_IMR					0x001c

#define SPI_CSR0				0x0030

#define SPI_CSR1				0x0034

#define SPI_CSR2				0x0038

#define SPI_CSR3				0x003c

#define SPI_RPR					0x0100

#define SPI_RCR					0x0104

#define SPI_TPR					0x0108

#define SPI_TCR					0x010c

#define SPI_RNPR				0x0110

#define SPI_RNCR				0x0114

#define SPI_TNPR				0x0118

#define SPI_TNCR				0x011c

#define SPI_PTCR				0x0120

#define SPI_PTSR				0x0124



/* Bitfields in CR */

#define SPI_SPIEN_OFFSET			0

#define SPI_SPIEN_SIZE				1

#define SPI_SPIDIS_OFFSET			1

#define SPI_SPIDIS_SIZE				1

#define SPI_SWRST_OFFSET			7

#define SPI_SWRST_SIZE				1

#define SPI_LASTXFER_OFFSET			24

#define SPI_LASTXFER_SIZE			1



/* Bitfields in MR */

#define SPI_MSTR_OFFSET				0

#define SPI_MSTR_SIZE				1

#define SPI_PS_OFFSET				1

#define SPI_PS_SIZE				1

#define SPI_PCSDEC_OFFSET			2

#define SPI_PCSDEC_SIZE				1

#define SPI_FDIV_OFFSET				3

#define SPI_FDIV_SIZE				1

#define SPI_MODFDIS_OFFSET			4

#define SPI_MODFDIS_SIZE			1

#define SPI_LLB_OFFSET				7

#define SPI_LLB_SIZE				1

#define SPI_PCS_OFFSET				16

#define SPI_PCS_SIZE				4

#define SPI_DLYBCS_OFFSET			24

#define SPI_DLYBCS_SIZE				8



/* Bitfields in RDR */

#define SPI_RD_OFFSET				0

#define SPI_RD_SIZE				16



/* Bitfields in TDR */

#define SPI_TD_OFFSET				0

#define SPI_TD_SIZE				16



/* Bitfields in SR */

#define SPI_RDRF_OFFSET				0

#define SPI_RDRF_SIZE				1

#define SPI_TDRE_OFFSET				1

#define SPI_TDRE_SIZE				1

#define SPI_MODF_OFFSET				2

#define SPI_MODF_SIZE				1

#define SPI_OVRES_OFFSET			3

#define SPI_OVRES_SIZE				1

#define SPI_ENDRX_OFFSET			4

#define SPI_ENDRX_SIZE				1

#define SPI_ENDTX_OFFSET			5

#define SPI_ENDTX_SIZE				1

#define SPI_RXBUFF_OFFSET			6

#define SPI_RXBUFF_SIZE				1

#define SPI_TXBUFE_OFFSET			7

#define SPI_TXBUFE_SIZE				1

#define SPI_NSSR_OFFSET				8

#define SPI_NSSR_SIZE				1

#define SPI_TXEMPTY_OFFSET			9

#define SPI_TXEMPTY_SIZE			1

#define SPI_SPIENS_OFFSET			16

#define SPI_SPIENS_SIZE				1



/* Bitfields in CSR0 */

#define SPI_CPOL_OFFSET				0

#define SPI_CPOL_SIZE				1

#define SPI_NCPHA_OFFSET			1

#define SPI_NCPHA_SIZE				1

#define SPI_CSAAT_OFFSET			3

#define SPI_CSAAT_SIZE				1

#define SPI_BITS_OFFSET				4

#define SPI_BITS_SIZE				4

#define SPI_SCBR_OFFSET				8

#define SPI_SCBR_SIZE				8

#define SPI_DLYBS_OFFSET			16

#define SPI_DLYBS_SIZE				8

#define SPI_DLYBCT_OFFSET			24

#define SPI_DLYBCT_SIZE				8



/* Bitfields in RCR */

#define SPI_RXCTR_OFFSET			0

#define SPI_RXCTR_SIZE				16



/* Bitfields in TCR */

#define SPI_TXCTR_OFFSET			0

#define SPI_TXCTR_SIZE				16



/* Bitfields in RNCR */

#define SPI_RXNCR_OFFSET			0

#define SPI_RXNCR_SIZE				16



/* Bitfields in TNCR */

#define SPI_TXNCR_OFFSET			0

#define SPI_TXNCR_SIZE				16



/* Bitfields in PTCR */

#define SPI_RXTEN_OFFSET			0

#define SPI_RXTEN_SIZE				1

#define SPI_RXTDIS_OFFSET			1

#define SPI_RXTDIS_SIZE				1

#define SPI_TXTEN_OFFSET			8

#define SPI_TXTEN_SIZE				1

#define SPI_TXTDIS_OFFSET			9

#define SPI_TXTDIS_SIZE				1



/* Constants for BITS */

#define SPI_BITS_8_BPT				0

#define SPI_BITS_9_BPT				1

#define SPI_BITS_10_BPT				2

#define SPI_BITS_11_BPT				3

#define SPI_BITS_12_BPT				4

#define SPI_BITS_13_BPT				5

#define SPI_BITS_14_BPT				6

#define SPI_BITS_15_BPT				7

#define SPI_BITS_16_BPT				8



/* Bit manipulation macros */

#define SPI_BIT(name) \

	(1 << SPI_##name##_OFFSET)

#define SPI_BF(name,value) \

	(((value) & ((1 << SPI_##name##_SIZE) - 1)) << SPI_##name##_OFFSET)

#define SPI_BFEXT(name,value) \

	(((value) >> SPI_##name##_OFFSET) & ((1 << SPI_##name##_SIZE) - 1))

#define SPI_BFINS(name,value,old) \

	( ((old) & ~(((1 << SPI_##name##_SIZE) - 1) << SPI_##name##_OFFSET)) \

	  | SPI_BF(name,value))



/* Register access macros */

#define spi_readl(port,reg) \

	__raw_readl((port)->regs + SPI_##reg)

#define spi_writel(port,reg,value) \

	__raw_writel((value), (port)->regs + SPI_##reg)



#endif /* __ATMEL_SPI_H__ */

drivers/spi/spi_altera.c→drivers/spi/spi-altera.c

+0 −0

File moved.

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drivers/spi/ath79_spi.c→drivers/spi/spi-ath79.c

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File moved.

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