Commit cb1bbbd4 authored by Andrzej Pietrasiewicz's avatar Andrzej Pietrasiewicz Committed by Mauro Carvalho Chehab
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media: hantro: Prepare for other G2 codecs 



VeriSilicon Hantro G2 core supports other codecs besides hevc.
Factor out some common code in preparation for vp9 support.

Signed-off-by: default avatarAndrzej Pietrasiewicz <andrzej.p@collabora.com>
Reviewed-by: default avatarBenjamin Gaignard <benjamin.gaignard@collabora.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 82fb363d

drivers/staging/media/hantro/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ hantro-vpu-y += \ 
		hantro_g1_mpeg2_dec.o \

		hantro_g2_hevc_dec.o \

		hantro_g1_vp8_dec.o \

		hantro_g2.o \

		rockchip_vpu2_hw_jpeg_enc.o \

		rockchip_vpu2_hw_h264_dec.o \

		rockchip_vpu2_hw_mpeg2_dec.o \

drivers/staging/media/hantro/hantro.h

+7 −0
Original line number Diff line number Diff line
@@ -369,6 +369,13 @@ static inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg) 
	writel(val, vpu->dec_base + reg);

}



static inline void hantro_write_addr(struct hantro_dev *vpu,

				     unsigned long offset,

				     dma_addr_t addr)

{

	vdpu_write(vpu, addr & 0xffffffff, offset);

}



static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)

{

	u32 val = readl(vpu->dec_base + reg);

drivers/staging/media/hantro/hantro_drv.c

+5 −0
Original line number Diff line number Diff line
@@ -907,6 +907,11 @@ static int hantro_probe(struct platform_device *pdev) 
	vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset;

	vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset;



	/**

	 * TODO: Eventually allow taking advantage of full 64-bit address space.

	 * Until then we assume the MSB portion of buffers' base addresses is

	 * always 0 due to this masking operation.

	 */

	ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32));

	if (ret) {

		dev_err(vpu->dev, "Could not set DMA coherent mask.\n");

drivers/staging/media/hantro/hantro_g2.c

0 → 100644
+26 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Hantro VPU codec driver

 *

 * Copyright (C) 2021 Collabora Ltd, Andrzej Pietrasiewicz <andrzej.p@collabora.com>

 */



#include "hantro_hw.h"

#include "hantro_g2_regs.h"



void hantro_g2_check_idle(struct hantro_dev *vpu)

{

	int i;



	for (i = 0; i < 3; i++) {

		u32 status;



		/* Make sure the VPU is idle */

		status = vdpu_read(vpu, G2_REG_INTERRUPT);

		if (status & G2_REG_INTERRUPT_DEC_E) {

			dev_warn(vpu->dev, "device still running, aborting");

			status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS;

			vdpu_write(vpu, status, G2_REG_INTERRUPT);

		}

	}

}

drivers/staging/media/hantro/hantro_g2_hevc_dec.c

+0 −31
Original line number Diff line number Diff line
@@ -8,20 +8,6 @@ 
#include "hantro_hw.h"

#include "hantro_g2_regs.h"



#define HEVC_DEC_MODE	0xC



#define BUS_WIDTH_32		0

#define BUS_WIDTH_64		1

#define BUS_WIDTH_128		2

#define BUS_WIDTH_256		3



static inline void hantro_write_addr(struct hantro_dev *vpu,

				     unsigned long offset,

				     dma_addr_t addr)

{

	vdpu_write(vpu, addr & 0xffffffff, offset);

}



static void prepare_tile_info_buffer(struct hantro_ctx *ctx)

{

	struct hantro_dev *vpu = ctx->dev;
@@ -566,23 +552,6 @@ static void prepare_scaling_list_buffer(struct hantro_ctx *ctx) 
	hantro_write_addr(vpu, G2_HEVC_SCALING_LIST_ADDR, ctx->hevc_dec.scaling_lists.dma);

}



static void hantro_g2_check_idle(struct hantro_dev *vpu)

{

	int i;



	for (i = 0; i < 3; i++) {

		u32 status;



		/* Make sure the VPU is idle */

		status = vdpu_read(vpu, G2_REG_INTERRUPT);

		if (status & G2_REG_INTERRUPT_DEC_E) {

			dev_warn(vpu->dev, "device still running, aborting");

			status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS;

			vdpu_write(vpu, status, G2_REG_INTERRUPT);

		}

	}

}



int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx)

{

	struct hantro_dev *vpu = ctx->dev;