Commit ce8f9abd authored by Ben Dooks's avatar Ben Dooks Committed by Kukjin Kim
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ARM: S5PC100: Change to using s3c_gpio_cfgpin_range() 



Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to
use the recently introduced s3c_gpio_cfgpin_range().

Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: Fixed wrong change]
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent d5e8123b

arch/arm/mach-s5pc100/dev-audio.c

+5 −27
Original line number Diff line number Diff line
@@ -24,19 +24,11 @@ static int s5pc100_cfg_i2s(struct platform_device *pdev) 
	/* configure GPIO for i2s port */

	switch (pdev->id) {

	case 1:

		s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(2));

		s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(2));

		s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(2));

		s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(2));

		s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(2));

		s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(2));

		break;



	case 2:

		s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(4));

		s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(4));

		s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(4));

		s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(4));

		s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(4));

		s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 5, S3C_GPIO_SFN(4));

		break;



	case -1: /* Dedicated pins */
@@ -144,19 +136,11 @@ static int s5pc100_pcm_cfg_gpio(struct platform_device *pdev) 
{

	switch (pdev->id) {

	case 0:

		s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(5));

		s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(5));

		s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(5));

		s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(5));

		s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(5));

		s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 5, S3C_GPIO_SFN(5));

		break;



	case 1:

		s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(3));

		s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(3));

		s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(3));

		s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(3));

		s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(3));

		s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(3));

		break;



	default:
@@ -231,13 +215,7 @@ struct platform_device s5pc100_device_pcm1 = { 


static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev)

{

	s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(4));

	s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(4));

	s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(4));

	s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(4));

	s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(4));



	return 0;

	return s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(4));

}



static struct resource s5pc100_ac97_resource[] = {

arch/arm/mach-s5pc100/dev-spi.c

+3 −8
Original line number Diff line number Diff line
@@ -38,18 +38,14 @@ static int s5pc100_spi_cfg_gpio(struct platform_device *pdev) 
{

	switch (pdev->id) {

	case 0:

		s3c_gpio_cfgpin(S5PC100_GPB(0), S3C_GPIO_SFN(2));

		s3c_gpio_cfgpin(S5PC100_GPB(1), S3C_GPIO_SFN(2));

		s3c_gpio_cfgpin(S5PC100_GPB(2), S3C_GPIO_SFN(2));

		s3c_gpio_cfgpin_range(S5PC100_GPB(0), 3, S3C_GPIO_SFN(2));

		s3c_gpio_setpull(S5PC100_GPB(0), S3C_GPIO_PULL_UP);

		s3c_gpio_setpull(S5PC100_GPB(1), S3C_GPIO_PULL_UP);

		s3c_gpio_setpull(S5PC100_GPB(2), S3C_GPIO_PULL_UP);

		break;



	case 1:

		s3c_gpio_cfgpin(S5PC100_GPB(4), S3C_GPIO_SFN(2));

		s3c_gpio_cfgpin(S5PC100_GPB(5), S3C_GPIO_SFN(2));

		s3c_gpio_cfgpin(S5PC100_GPB(6), S3C_GPIO_SFN(2));

		s3c_gpio_cfgpin_range(S5PC100_GPB(4), 3, S3C_GPIO_SFN(2));

		s3c_gpio_setpull(S5PC100_GPB(4), S3C_GPIO_PULL_UP);

		s3c_gpio_setpull(S5PC100_GPB(5), S3C_GPIO_PULL_UP);

		s3c_gpio_setpull(S5PC100_GPB(6), S3C_GPIO_PULL_UP);
@@ -57,8 +53,7 @@ static int s5pc100_spi_cfg_gpio(struct platform_device *pdev) 


	case 2:

		s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3));

		s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(3));

		s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(3));

		s3c_gpio_cfgpin_range(S5PC100_GPB(2), 2, S3C_GPIO_SFN(3));

		s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP);

		s3c_gpio_setpull(S5PC100_GPG3(2), S3C_GPIO_PULL_UP);

		s3c_gpio_setpull(S5PC100_GPG3(3), S3C_GPIO_PULL_UP);

arch/arm/mach-s5pc100/setup-sdhci-gpio.c

+6 −9
Original line number Diff line number Diff line
@@ -37,10 +37,9 @@ void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) 
	end = S5PC100_GPG0(2 + num);



	/* Set all the necessary GPG0/GPG1 pins to special-function 0 */

	for (gpio = S5PC100_GPG0(0); gpio < end; gpio++) {

		s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));

	s3c_gpio_cfgpin_range(S5PC100_GPG0(0), 2 + num, S3C_GPIO_SFN(2));

	for (gpio = S5PC100_GPG0(0); gpio < end; gpio++)

		s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);

	}



	if (width == 8) {

		for (gpio = S5PC100_GPG1(0); gpio <= S5PC100_GPG1(1); gpio++) {
@@ -64,10 +63,9 @@ void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) 
	end = S5PC100_GPG2(2 + width);



	/* Set all the necessary GPG2 pins to special-function 2 */

	for (gpio = S5PC100_GPG2(0); gpio < end; gpio++) {

		s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));

	s3c_gpio_cfgpin_range(S5PC100_GPG2(0), 2 + width, S3C_GPIO_SFN(2));

	for (gpio = S5PC100_GPG2(0); gpio < end; gpio++)

		s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);

	}



	if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {

		s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP);
@@ -84,10 +82,9 @@ void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) 
	end = S5PC100_GPG3(2 + width);



	/* Set all the necessary GPG3 pins to special-function 2 */

	for (gpio = S5PC100_GPG3(0); gpio < end; gpio++) {

		s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));

	s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 2 + width, S3C_GPIO_SFN(2));

	for (gpio = S5PC100_GPG3(0); gpio < end; gpio++)

		s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);

	}



	if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {

		s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP);