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Commit cf67edce authored by Miquel Raynal's avatar Miquel Raynal
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mtd: rawnand: arasan: Use the right DMA mask



Xilinx ZynqMP SoC and the Arasan controller support 64-bit DMA
addressing. Define the right mask otherwise the default is 32
and some accesses may overflow the default mask.

Reported-by: default avatarJorge Courett <jorge.courett@gmail.com>
Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Tested-by: default avatarJorge Courett <jorge.courett@gmail.com>
Link: https://lore.kernel.org/linux-mtd/20210527084548.208429-1-miquel.raynal@bootlin.com
parent c93081b2
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