Unverified Commit cfd5bdf3 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'socfpga_dts_updates_for_v6.3' of... 

Merge tag 'socfpga_dts_updates_for_v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt

SoCFPGA dts updates for v6.3
- Align UART node with bindings
- Add pinctrl properties for Stratix10/Agilex
- Change address-cells to 2 to support 64-bit address for fpga region

* tag 'socfpga_dts_updates_for_v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: socfpga: change address-cells to support 64-bit addressing
  arm64: dts: stratix10: add i2c pins for pinctrl
  arm64: dts: add pinctrl-single property for Stratix10/Agilex
  ARM: dts: socfpga: align UART node name with bindings

Link: https://lore.kernel.org/r/20230206162425.311593-1-dinguyen@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents f7401f6b 2f8ba037

arch/arm/boot/dts/socfpga.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -905,7 +905,7 @@ timer3: timer3@ffd01000 { 
			reset-names = "timer";

		};



		uart0: serial0@ffc02000 {

		uart0: serial@ffc02000 {

			compatible = "snps,dw-apb-uart";

			reg = <0xffc02000 0x1000>;

			interrupts = <0 162 4>;
@@ -918,7 +918,7 @@ uart0: serial0@ffc02000 { 
			resets = <&rst UART0_RESET>;

		};



		uart1: serial1@ffc03000 {

		uart1: serial@ffc03000 {

			compatible = "snps,dw-apb-uart";

			reg = <0xffc03000 0x1000>;

			interrupts = <0 163 4>;

arch/arm/boot/dts/socfpga_arria10.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -845,7 +845,7 @@ timer3: timer3@ffd00100 { 
			reset-names = "timer";

		};



		uart0: serial0@ffc02000 {

		uart0: serial@ffc02000 {

			compatible = "snps,dw-apb-uart";

			reg = <0xffc02000 0x100>;

			interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
@@ -856,7 +856,7 @@ uart0: serial0@ffc02000 { 
			status = "disabled";

		};



		uart1: serial1@ffc02100 {

		uart1: serial@ffc02100 {

			compatible = "snps,dw-apb-uart";

			reg = <0xffc02100 0x100>;

			interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;

arch/arm/boot/dts/socfpga_vt.dts

+2 −2
Original line number Diff line number Diff line
@@ -57,11 +57,11 @@ timer3@ffd01000 { 
			clock-frequency = <7000000>;

		};



		serial0@ffc02000 {

		serial@ffc02000 {

			clock-frequency = <7372800>;

		};



		serial1@ffc03000 {

		serial@ffc03000 {

			clock-frequency = <7372800>;

		};

arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi

+18 −3
Original line number Diff line number Diff line
@@ -134,9 +134,8 @@ soc { 
		ranges = <0 0 0 0xffffffff>;



		base_fpga_region {

			#address-cells = <0x1>;

			#size-cells = <0x1>;



			#address-cells = <0x2>;

			#size-cells = <0x2>;

			compatible = "fpga-region";

			fpga-mgr = <&fpga_mgr>;

		};
@@ -353,6 +352,22 @@ pdma: dma-controller@ffda0000 { 
			reset-names = "dma", "dma-ocp";

		};



		pinctrl0: pinctrl@ffd13000 {

			compatible = "pinctrl-single";

			reg = <0xffd13000 0xA0>;

			#pinctrl-cells = <1>;

			pinctrl-single,register-width = <32>;

			pinctrl-single,function-mask = <0x0000000f>;

		};



		pinctrl1: pinctrl@ffd13100 {

			compatible = "pinctrl-single";

			reg = <0xffd13100 0x20>;

			#pinctrl-cells = <1>;

			pinctrl-single,register-width = <32>;

			pinctrl-single,function-mask = <0x0000000f>;

		};



		rst: rstmgr@ffd11000 {

			#reset-cells = <1>;

			compatible = "altr,stratix10-rst-mgr";

arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts

+23 −0
Original line number Diff line number Diff line
@@ -65,6 +65,22 @@ sdmmca-ecc@ff8c8c00 { 
	};

};



&pinctrl0 {

	i2c1_pmx_func: i2c1-pmx-func {

		pinctrl-single,pins = <

			0x78   0x4   /* I2C1_SDA (IO6-B) PIN30SEL) */

			0x7c   0x4   /* I2C1_SCL (IO7-B) PIN31SEL */

		>;

	};



	i2c1_pmx_func_gpio: i2c1-pmx-func-gpio {

		pinctrl-single,pins = <

			0x78   0x8   /* I2C1_SDA (IO6-B) PIN30SEL) */

			0x7c   0x8   /* I2C1_SCL (IO7-B) PIN31SEL */

		>;

	};

};



&gpio1 {

	status = "okay";

};
@@ -131,6 +147,13 @@ &i2c1 { 
	i2c-sda-falling-time-ns = <890>;  /* hcnt */

	i2c-sdl-falling-time-ns = <890>;  /* lcnt */



	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&i2c1_pmx_func>;

	pinctrl-1 = <&i2c1_pmx_func_gpio>;



	scl-gpios = <&portb 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&portb 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;



	adc@14 {

		compatible = "lltc,ltc2497";

		reg = <0x14>;