Commit d04b961d authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
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pinctrl: renesas: r8a77995: Add support for AVB power-source 



Add support for configuring the I/O voltage level of the Ethernet AVB
pins on the R-Car D3 SoC.  "PIN_VDDQ_AVB0" can be configured for 2.5V or
3.3V operation.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/8f9164487715d8a4898ca651038c0b4d5013764c.1678271030.git.geert+renesas@glider.be
parent 7f25d5b0

drivers/pinctrl/renesas/pfc-r8a77995.c

+14 −7
Original line number Diff line number Diff line
@@ -34,7 +34,8 @@ 
	PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP),		\

	PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP),		\

	PIN_NOGP_CFG(TMS, "TMS", fn, SH_PFC_PIN_CFG_PULL_UP),		\

	PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP)

	PIN_NOGP_CFG(TRST_N, "TRST#", fn, SH_PFC_PIN_CFG_PULL_UP),	\

	PIN_NOGP_CFG(VDDQ_AVB0, "VDDQ_AVB0", fn, SH_PFC_PIN_CFG_IO_VOLTAGE_25_33)



/*

 * F_() : just information
@@ -2857,11 +2858,13 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { 


enum ioctrl_regs {

	POCCTRL0,

	POCCTRL2,

	TDSELCTRL,

};



static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {

	[POCCTRL0] = { 0xe6060380, },

	[POCCTRL2] = { 0xe6060388, },

	[TDSELCTRL] = { 0xe60603c0, },

	{ /* sentinel */ },

};
@@ -2869,14 +2872,18 @@ static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = { 


static int r8a77995_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)

{

	int bit = -EINVAL;



	switch (pin) {

	case RCAR_GP_PIN(3, 0) ... RCAR_GP_PIN(3, 9):

		*pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg;

		return 29 - (pin - RCAR_GP_PIN(3, 0));



	if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 9))

		bit = 29 - (pin - RCAR_GP_PIN(3, 0));

	case PIN_VDDQ_AVB0:

		*pocctrl = pinmux_ioctrl_regs[POCCTRL2].reg;

		return 0;



	return bit;

	default:

		return -EINVAL;

	}

}



static const struct pinmux_bias_reg pinmux_bias_regs[] = {