Commit d3b2c172 authored by Larry Finger's avatar Larry Finger
Browse files

staging: rtl8192e: Prepare header files to ease use of typedef enum conversion 



The tool that I am using fails for certain conditions. This patch makes trivial
changes to the source to allow the tool to work for all cases.

I also remove some artifacts left from the typedef struct conversion.

Signed-off-by: default avatarLarry Finger <Larry.Finger@lwfinger.net>
parent 66ba443a

drivers/staging/rtl8192e/r8190P_def.h

+15 −15
Original line number Diff line number Diff line
@@ -29,7 +29,7 @@ 
#define RX_CMD_QUEUE				1





typedef enum _rtl819x_loopback{

typedef enum _rtl819x_loopback_e{

	RTL819X_NO_LOOPBACK = 0,

	RTL819X_MAC_LOOPBACK = 1,

	RTL819X_DMA_LOOPBACK = 2,
@@ -178,7 +178,7 @@ struct bb_reg_definition { 
	u32 rfTxAFE;

	u32 rfLSSIReadBack;

	u32 rfLSSIReadBackPi;

};//, *struct bb_reg_definition *;

};



struct tx_fwinfo {

	u8			TxRate:7;
@@ -205,7 +205,7 @@ struct tx_fwinfo { 
	u32			TxAGCSign:1;

	u32			Tx_INFO_RSVD:6;

	u32			PacketID:13;

};//;

};



struct tx_fwinfo_8190pci {

	u8			TxRate:7;
@@ -237,7 +237,7 @@ struct tx_fwinfo_8190pci { 
	u32			PacketID:13;





};//, *struct tx_fwinfo_8190pci *;

};





#define TX_DESC_SIZE			32
@@ -276,7 +276,7 @@ struct phy_ofdm_rx_status_rxsc_sgien_exintfflag { 
	u8			rxsc:2;

	u8			sgi_en:1;

	u8			ex_intf_flag:1;

};//;

};



struct phy_sts_ofdm_819xpci {

	u8	trsw_gain_X[4];
@@ -292,13 +292,13 @@ struct phy_sts_ofdm_819xpci { 
	u8	max_ex_pwr;

	u8	sgi_en;

	u8	rxsc_sgien_exflg;

};//;

};



struct phy_sts_cck_819xpci {

	u8	adc_pwdb_X[4];

	u8	sq_rpt;

	u8	cck_agc_rpt;

};//;

};





#define		PHY_RSSI_SLID_WIN_MAX				100
@@ -340,7 +340,7 @@ struct tx_desc { 
        u32	Reserved5;

        u32	Reserved6;

        u32	Reserved7;

};//, *ptx_desc;

};





struct tx_desc_cmd {
@@ -364,7 +364,7 @@ struct tx_desc_cmd { 
	u32	Reserved4;

	u32	Reserved5;

	u32	Reserved6;

};//, *ptx_desc_cmd;

};



struct rx_desc {

	u16			Length:14;
@@ -385,7 +385,7 @@ struct rx_desc { 


	u32	BufferAddress;



};//, *prx_desc;

};





struct rx_fwinfo {
@@ -407,6 +407,6 @@ struct rx_fwinfo { 


	u32			TSFL;



};//, *prx_fwinfo;

};



#endif

drivers/staging/rtl8192e/r8192E_cmdpkt.h

+6 −6
Original line number Diff line number Diff line
@@ -55,14 +55,14 @@ struct cmpk_txfb { 


	u16	reserve3;			/* */

	u16	duration;			/* */

};//;

};



struct cmpk_intr_sta {

	u8	element_id;

	u8	length;

	u16	reserve;

	u32	interrupt_status;

};//;

};





struct cmpk_set_cfg {
@@ -79,7 +79,7 @@ struct cmpk_set_cfg { 
	u8	cfg_offset;

	u32	value;

	u32	mask;

};//;

};



#define		cmpk_query_cfg_t	struct cmpk_set_cfg
@@ -118,7 +118,7 @@ struct cmpk_rx_dbginfo { 
	u8	element_id;





};//;

};



struct cmpk_tx_rahis {

	u8	element_id;
@@ -137,7 +137,7 @@ struct cmpk_tx_rahis { 


} __packed;



typedef enum tag_command_packet_directories

typedef enum _cmpk_element_e

{

    RX_TX_FEEDBACK = 0,

    RX_INTERRUPT_STATUS		= 1,

drivers/staging/rtl8192e/r8192E_firmware.h

+10 −10
Original line number Diff line number Diff line
@@ -23,13 +23,13 @@ 


#define GET_COMMAND_PACKET_FRAG_THRESHOLD(v)	(4*(v/4) - 8 )



typedef enum _firmware_init_step{

typedef enum _firmware_init_step_e{

	FW_INIT_STEP0_BOOT = 0,

	FW_INIT_STEP1_MAIN = 1,

	FW_INIT_STEP2_DATA = 2,

} firmware_init_step_e;



typedef enum _opt_rst_type{

typedef enum _opt_rst_type_e{

	OPT_SYSTEM_RESET = 0,

	OPT_FIRMWARE_RESET = 1,

} opt_rst_type_e;
@@ -39,12 +39,12 @@ typedef enum _desc_packet_type_e{ 
	DESC_PACKET_TYPE_NORMAL = 1,

} desc_packet_type_e;



typedef enum _firmware_source{

typedef enum _firmware_source_e{

	FW_SOURCE_IMG_FILE = 0,

	FW_SOURCE_HEADER_FILE = 1,

} firmware_source_e, *pfirmware_source_e;



typedef enum _firmware_status{

typedef enum _firmware_status_e{

	FW_STATUS_0_INIT = 0,

	FW_STATUS_1_MOVE_BOOT_CODE = 1,

	FW_STATUS_2_MOVE_MAIN_CODE = 2,
@@ -56,7 +56,7 @@ typedef enum _firmware_status{ 
struct fw_seg_container {

	u16	seg_size;

	u8	*seg_ptr;

};//, *pfw_seg_container;

};



struct rt_firmware {

	firmware_status_e firmware_status;

drivers/staging/rtl8192e/r8192E_phy.h

+3 −3
Original line number Diff line number Diff line
@@ -73,7 +73,7 @@ extern u32 rtl819XRadioB_Array[]; 
extern u32 rtl819XRadioC_Array[];

extern u32 rtl819XRadioD_Array[];



typedef enum _HW90_BLOCK {

typedef enum _HW90_BLOCK_E {

	HW90_BLOCK_MAC = 0,

	HW90_BLOCK_PHY0 = 1,

	HW90_BLOCK_PHY1 = 2,
@@ -81,7 +81,7 @@ typedef enum _HW90_BLOCK { 
	HW90_BLOCK_MAXIMUM = 4,

} HW90_BLOCK_E, *PHW90_BLOCK_E;



typedef enum _RF90_RADIO_PATH{

typedef enum _RF90_RADIO_PATH_E{

	RF90_PATH_A = 0,

	RF90_PATH_B = 1,

	RF90_PATH_C = 2,

drivers/staging/rtl8192e/rtl819x_HT.h

+20 −20
Original line number Diff line number Diff line
@@ -327,7 +327,7 @@ struct rt_htinfo_sta_entry { 


	u16                     nAMSDU_MaxSize;



};//, *struct rt_htinfo_sta_entry *;

};
@@ -359,12 +359,12 @@ struct mimo_rssi { 
	u32	AntennaC;

	u32	AntennaD;

	u32	Average;

};//, *struct mimo_rssi *;

};



struct mimo_evm {

	u32	EVM1;

	u32    EVM2;

};//, *struct mimo_evm *;

};



struct false_alarm_stats {

	u32	Cnt_Parity_Fail;
@@ -374,7 +374,7 @@ struct false_alarm_stats { 
	u32	Cnt_Ofdm_fail;

	u32	Cnt_Cck_fail;

	u32	Cnt_all;

};//, *struct false_alarm_stats *;

};





extern u8 MCS_FILTER_ALL[16];
@@ -397,14 +397,14 @@ extern u8 MCS_FILTER_1SS[16]; 


#define		IS_11N_MCS_RATE(rate)		(rate&0x80)



typedef enum _HT_AGGRE_SIZE{

typedef enum _HT_AGGRE_SIZE_E{

	HT_AGG_SIZE_8K = 0,

	HT_AGG_SIZE_16K = 1,

	HT_AGG_SIZE_32K = 2,

	HT_AGG_SIZE_64K = 3,

} HT_AGGRE_SIZE_E, *PHT_AGGRE_SIZE_E;



typedef enum _HT_IOT_PEER

typedef enum _HT_IOT_PEER_E

{

	HT_IOT_PEER_UNKNOWN = 0,

	HT_IOT_PEER_REALTEK = 1,
@@ -420,12 +420,12 @@ typedef enum _HT_IOT_PEER 
	HT_IOT_PEER_MAX = 11,

} HT_IOT_PEER_E, *PHTIOT_PEER_E;



typedef enum _HT_IOT_PEER_SUBTYPE

typedef enum _HT_IOT_PEER_SUBTYPE_E

{

	HT_IOT_PEER_ATHEROS_DIR635 = 0,

} HT_IOT_PEER_SUBTYPE_E, *PHTIOT_PEER_SUBTYPE_E;



typedef enum _HT_IOT_ACTION{

typedef enum _HT_IOT_ACTION_E{

	HT_IOT_ACT_TX_USE_AMSDU_4K = 0x00000001,

	HT_IOT_ACT_TX_USE_AMSDU_8K = 0x00000002,

	HT_IOT_ACT_DISABLE_MCS14 = 0x00000004,
@@ -466,7 +466,7 @@ typedef enum _HT_IOT_RAFUNC{ 
	HT_IOT_RAFUNC_TX_AMSDU = 0x02,

} HT_IOT_RAFUNC, *PHT_IOT_RAFUNC;



typedef enum _RT_HT_CAP{

typedef enum _RT_HT_CAPBILITY{

	RT_HT_CAP_USE_TURBO_AGGR = 0x01,

	RT_HT_CAP_USE_LONG_PREAMBLE = 0x02,

	RT_HT_CAP_USE_AMPDU = 0x04,