Commit d3ef125c authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson
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arm64: dts: qcom: sdm845: Add CPU BWMON 



Add device node for CPU-memory BWMON device (bandwidth monitoring) on
SDM845 measuring bandwidth between CPU (gladiator_noc) and Last Level
Cache (memnoc).  Usage of this BWMON allows to remove fixed bandwidth
votes from cpufreq (CPU nodes) thus achieve high memory throughput even
with lower CPU frequencies.

Co-developed-by: default avatarThara Gopinath <thara.gopinath@gmail.com>
Signed-off-by: default avatarThara Gopinath <thara.gopinath@gmail.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220704121730.127925-5-krzysztof.kozlowski@linaro.org
parent 7d9c1da9

arch/arm64/boot/dts/qcom/sdm845.dtsi

+37 −0
Original line number Diff line number Diff line
@@ -2053,6 +2053,43 @@ llcc: system-cache-controller@1100000 { 
			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;

		};



		pmu@1436400 {

			compatible = "qcom,sdm845-bwmon", "qcom,msm8998-bwmon";

			reg = <0 0x01436400 0 0x600>;

			interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;

			interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>;



			operating-points-v2 = <&cpu_bwmon_opp_table>;



			cpu_bwmon_opp_table: opp-table {

				compatible = "operating-points-v2";



				/*

				 * The interconnect path bandwidth taken from

				 * cpu4_opp_table bandwidth for OSM L3

				 * interconnect.  This also matches the OSM L3

				 * from bandwidth table of qcom,cpu4-l3lat-mon

				 * (qcom,core-dev-table, bus width: 16 bytes)

				 * from msm-4.9 downstream kernel.

				 */

				opp-0 {

					opp-peak-kBps = <4800000>;

				};

				opp-1 {

					opp-peak-kBps = <9216000>;

				};

				opp-2 {

					opp-peak-kBps = <15052800>;

				};

				opp-3 {

					opp-peak-kBps = <20889600>;

				};

				opp-4 {

					opp-peak-kBps = <25497600>;

				};

			};

		};



		pcie0: pci@1c00000 {

			compatible = "qcom,pcie-sdm845";

			reg = <0 0x01c00000 0 0x2000>,