Commit d4d6f03c authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Greg Kroah-Hartman
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serial: max310x: Try to get crystal clock rate from property



In some configurations, mainly ACPI-based, the clock frequency of the device
is supplied by very well established 'clock-frequency' property. Hence, try
to get it from the property at last if no other providers are available.

Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210517172930.83353-1-andriy.shevchenko@linux.intel.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 18ee37e1
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+26 −14
Original line number Diff line number Diff line
@@ -552,7 +552,7 @@ static int max310x_update_best_err(unsigned long f, long *besterr)
	return 1;
}

static int max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
static u32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
			       unsigned long freq, bool xtal)
{
	unsigned int div, clksrc, pllcfg = 0;
@@ -618,7 +618,7 @@ static int max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
		}
	}

	return (int)bestfreq;
	return bestfreq;
}

static void max310x_batch_write(struct uart_port *port, u8 *txbuf, unsigned int len)
@@ -1253,9 +1253,10 @@ static int max310x_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
static int max310x_probe(struct device *dev, const struct max310x_devtype *devtype,
			 struct regmap *regmap, int irq)
{
	int i, ret, fmin, fmax, freq, uartclk;
	int i, ret, fmin, fmax, freq;
	struct max310x_port *s;
	bool xtal = false;
	u32 uartclk = 0;
	bool xtal;

	if (IS_ERR(regmap))
		return PTR_ERR(regmap);
@@ -1267,24 +1268,20 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
		return -ENOMEM;
	}

	/* Always ask for fixed clock rate from a property. */
	device_property_read_u32(dev, "clock-frequency", &uartclk);

	s->clk = devm_clk_get_optional(dev, "osc");
	if (IS_ERR(s->clk))
		return PTR_ERR(s->clk);
	if (s->clk) {
		fmin = 500000;
		fmax = 35000000;
		xtal = false;
	} else {
		s->clk = devm_clk_get_optional(dev, "xtal");
		if (IS_ERR(s->clk))
			return PTR_ERR(s->clk);
		if (s->clk) {
			fmin = 1000000;
			fmax = 4000000;

		xtal = true;
		} else {
			dev_err(dev, "Cannot get clock\n");
			return -EINVAL;
		}
	}

	ret = clk_prepare_enable(s->clk);
@@ -1292,6 +1289,21 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
		return ret;

	freq = clk_get_rate(s->clk);
	if (freq == 0)
		freq = uartclk;
	if (freq == 0) {
		dev_err(dev, "Cannot get clock rate\n");
		return -EINVAL;
	}

	if (xtal) {
		fmin = 1000000;
		fmax = 4000000;
	} else {
		fmin = 500000;
		fmax = 35000000;
	}

	/* Check frequency limits */
	if (freq < fmin || freq > fmax) {
		ret = -ERANGE;