Commit d5f2e747 authored by Roger Quadros's avatar Roger Quadros Committed by Vinod Koul
Browse files

dt-bindings: phy: ti,phy-j721e-wiz: Add support for ti,j7200-wiz-10g 



ti,j7200-wiz-10g supports an additional reference clock.
Add compatible and the additional clock.

Cc: Rob Herring <robh@kernel.org>
Signed-off-by: default avatarRoger Quadros <rogerq@kernel.org>
Acked-by: default avatarRob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220628122255.24265-6-rogerq@kernel.org


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 1aa54982

Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml

+20 −1
Original line number Diff line number Diff line
@@ -16,19 +16,23 @@ properties: 
      - ti,j721e-wiz-16g

      - ti,j721e-wiz-10g

      - ti,am64-wiz-10g

      - ti,j7200-wiz-10g



  power-domains:

    maxItems: 1



  clocks:

    maxItems: 3

    minItems: 3

    maxItems: 4

    description: clock-specifier to represent input to the WIZ



  clock-names:

    minItems: 3

    items:

      - const: fck

      - const: core_ref_clk

      - const: ext_ref_clk

      - const: core_ref1_clk



  num-lanes:

    minimum: 1
@@ -106,6 +110,11 @@ properties: 
      - assigned-clocks

      - assigned-clock-parents



  ti,scm:

    $ref: /schemas/types.yaml#/definitions/phandle

    description: |

      phandle to System Control Module for syscon regmap access.



patternProperties:

  "^pll[0|1]-refclk$":

    type: object
@@ -173,6 +182,16 @@ required: 
  - "#reset-cells"

  - ranges



allOf:

  - if:

      properties:

        compatible:

          contains:

            const: ti,j7200-wiz-10g

    then:

      required:

        - ti,scm



additionalProperties: false



examples: