Commit d62eaddb authored by Jesse Zhang's avatar Jesse Zhang Committed by Alex Deucher
Browse files

drm/amdkfd: correct the cache info for gfx1036 



correct the cache information for gfx1036

Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarYifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: default avatarYifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: default avatarJesse Zhang <jesse.zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a9232b06

drivers/gpu/drm/amd/amdkfd/kfd_crat.c

+52 −1
Original line number Diff line number Diff line
@@ -843,6 +843,54 @@ static struct kfd_gpu_cache_info gfx1037_cache_info[] = { 
	},

};



static struct kfd_gpu_cache_info gc_10_3_6_cache_info[] = {

	{

		/* TCP L1 Cache per CU */

		.cache_size = 16,

		.cache_level = 1,

		.flags = (CRAT_CACHE_FLAGS_ENABLED |

			  CRAT_CACHE_FLAGS_DATA_CACHE |

			  CRAT_CACHE_FLAGS_SIMD_CACHE),

		.num_cu_shared = 1,

	},

	{

		/* Scalar L1 Instruction Cache per SQC */

		.cache_size = 32,

		.cache_level = 1,

		.flags = (CRAT_CACHE_FLAGS_ENABLED |

			  CRAT_CACHE_FLAGS_INST_CACHE |

			  CRAT_CACHE_FLAGS_SIMD_CACHE),

		.num_cu_shared = 2,

	},

	{

		/* Scalar L1 Data Cache per SQC */

		.cache_size = 16,

		.cache_level = 1,

		.flags = (CRAT_CACHE_FLAGS_ENABLED |

			  CRAT_CACHE_FLAGS_DATA_CACHE |

			  CRAT_CACHE_FLAGS_SIMD_CACHE),

		.num_cu_shared = 2,

	},

	{

		/* GL1 Data Cache per SA */

		.cache_size = 128,

		.cache_level = 1,

		.flags = (CRAT_CACHE_FLAGS_ENABLED |

			  CRAT_CACHE_FLAGS_DATA_CACHE |

			  CRAT_CACHE_FLAGS_SIMD_CACHE),

		.num_cu_shared = 2,

	},

	{

		/* L2 Data Cache per GPU (Total Tex Cache) */

		.cache_size = 256,

		.cache_level = 2,

		.flags = (CRAT_CACHE_FLAGS_ENABLED |

			  CRAT_CACHE_FLAGS_DATA_CACHE |

			  CRAT_CACHE_FLAGS_SIMD_CACHE),

		.num_cu_shared = 2,

	},

};



static void kfd_populated_cu_info_cpu(struct kfd_topology_device *dev,

		struct crat_subtype_computeunit *cu)

{
@@ -1562,10 +1610,13 @@ static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev, 
			num_of_cache_types = ARRAY_SIZE(beige_goby_cache_info);

			break;

		case IP_VERSION(10, 3, 3):

		case IP_VERSION(10, 3, 6): /* TODO: Double check these on production silicon */

			pcache_info = yellow_carp_cache_info;

			num_of_cache_types = ARRAY_SIZE(yellow_carp_cache_info);

			break;

		case IP_VERSION(10, 3, 6):

			pcache_info = gc_10_3_6_cache_info;

			num_of_cache_types = ARRAY_SIZE(gc_10_3_6_cache_info);

			break;

		case IP_VERSION(10, 3, 7):

			pcache_info = gfx1037_cache_info;

			num_of_cache_types = ARRAY_SIZE(gfx1037_cache_info);