Commit d63833b8 authored by Ulrich Hecht's avatar Ulrich Hecht Committed by Geert Uytterhoeven
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arm64: dts: renesas: r8a779a0: Add CANFD device node 



This patch adds a CANFD device node for r8a779a0.

Based on patch by Kazuya Mizuguchi.

Signed-off-by: default avatarUlrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20220309162609.3726306-3-uli+renesas@fpond.eu


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 9a4259e5

arch/arm64/boot/dts/renesas/r8a779a0.dtsi

+56 −0
Original line number Diff line number Diff line
@@ -24,6 +24,13 @@ aliases { 
		i2c6 = &i2c6;

	};



	/* External CAN clock - to be overridden by boards that provide it */

	can_clk: can {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -596,6 +603,55 @@ hscif3: serial@e66a0000 { 
			status = "disabled";

		};



		canfd: can@e6660000 {

			compatible = "renesas,r8a779a0-canfd";

			reg = <0 0xe6660000 0 0x8000>;

			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,

					<GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "ch_int", "g_int";

			clocks = <&cpg CPG_MOD 328>,

				 <&cpg CPG_CORE R8A779A0_CLK_CANFD>,

				 <&can_clk>;

			clock-names = "fck", "canfd", "can_clk";

			assigned-clocks = <&cpg CPG_CORE R8A779A0_CLK_CANFD>;

			assigned-clock-rates = <80000000>;

			power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;

			resets = <&cpg 328>;

			status = "disabled";



			channel0 {

				status = "disabled";

			};



			channel1 {

				status = "disabled";

			};



			channel2 {

				status = "disabled";

			};



			channel3 {

				status = "disabled";

			};



			channel4 {

				status = "disabled";

			};



			channel5 {

				status = "disabled";

			};



			channel6 {

				status = "disabled";

			};



			channel7 {

				status = "disabled";

			};

		};



		avb0: ethernet@e6800000 {

			compatible = "renesas,etheravb-r8a779a0",

				     "renesas,etheravb-rcar-gen3";