Loading arch/x86/include/asm/kvm_host.h +0 −5 Original line number Diff line number Diff line Loading @@ -723,11 +723,6 @@ static inline void kvm_get_idt(struct desc_ptr *table) asm("sidt %0" : "=m"(*table)); } static inline void kvm_get_gdt(struct desc_ptr *table) { asm("sgdt %0" : "=m"(*table)); } static inline unsigned long kvm_read_tr_base(void) { u16 tr; Loading arch/x86/kvm/svm.c +1 −1 Original line number Diff line number Diff line Loading @@ -368,7 +368,7 @@ static int svm_hardware_enable(void *garbage) sd->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1; sd->next_asid = sd->max_asid + 1; kvm_get_gdt(&gdt_descr); native_store_gdt(&gdt_descr); gdt = (struct desc_struct *)gdt_descr.address; sd->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS); Loading arch/x86/kvm/vmx.c +2 −2 Original line number Diff line number Diff line Loading @@ -603,7 +603,7 @@ static void reload_tss(void) struct desc_ptr gdt; struct desc_struct *descs; kvm_get_gdt(&gdt); native_store_gdt(&gdt); descs = (void *)gdt.address; descs[GDT_ENTRY_TSS].type = 9; /* available TSS */ load_TR_desc(); Loading Loading @@ -767,7 +767,7 @@ static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu) * processors. */ vmcs_writel(HOST_TR_BASE, kvm_read_tr_base()); /* 22.2.4 */ kvm_get_gdt(&dt); native_store_gdt(&dt); vmcs_writel(HOST_GDTR_BASE, dt.address); /* 22.2.4 */ rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp); Loading arch/x86/kvm/x86.c +1 −1 Original line number Diff line number Diff line Loading @@ -233,7 +233,7 @@ unsigned long segment_base(u16 selector) if (selector == 0) return 0; kvm_get_gdt(&gdt); native_store_gdt(&gdt); table_base = gdt.address; if (selector & 4) { /* from ldt */ Loading Loading
arch/x86/include/asm/kvm_host.h +0 −5 Original line number Diff line number Diff line Loading @@ -723,11 +723,6 @@ static inline void kvm_get_idt(struct desc_ptr *table) asm("sidt %0" : "=m"(*table)); } static inline void kvm_get_gdt(struct desc_ptr *table) { asm("sgdt %0" : "=m"(*table)); } static inline unsigned long kvm_read_tr_base(void) { u16 tr; Loading
arch/x86/kvm/svm.c +1 −1 Original line number Diff line number Diff line Loading @@ -368,7 +368,7 @@ static int svm_hardware_enable(void *garbage) sd->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1; sd->next_asid = sd->max_asid + 1; kvm_get_gdt(&gdt_descr); native_store_gdt(&gdt_descr); gdt = (struct desc_struct *)gdt_descr.address; sd->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS); Loading
arch/x86/kvm/vmx.c +2 −2 Original line number Diff line number Diff line Loading @@ -603,7 +603,7 @@ static void reload_tss(void) struct desc_ptr gdt; struct desc_struct *descs; kvm_get_gdt(&gdt); native_store_gdt(&gdt); descs = (void *)gdt.address; descs[GDT_ENTRY_TSS].type = 9; /* available TSS */ load_TR_desc(); Loading Loading @@ -767,7 +767,7 @@ static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu) * processors. */ vmcs_writel(HOST_TR_BASE, kvm_read_tr_base()); /* 22.2.4 */ kvm_get_gdt(&dt); native_store_gdt(&dt); vmcs_writel(HOST_GDTR_BASE, dt.address); /* 22.2.4 */ rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp); Loading
arch/x86/kvm/x86.c +1 −1 Original line number Diff line number Diff line Loading @@ -233,7 +233,7 @@ unsigned long segment_base(u16 selector) if (selector == 0) return 0; kvm_get_gdt(&gdt); native_store_gdt(&gdt); table_base = gdt.address; if (selector & 4) { /* from ldt */ Loading