Unverified Commit d6e58e37 authored by Mark Brown's avatar Mark Brown
Browse files

Merge series "spi: Set of cleanups" from Jay Fang <f.fangjian@huawei.com>:

Some cleanups of SPI drivers. No functional change.

Thanks,
Jay

Jay Fang (4):
  spi: ppc4xx: include <linux/io.h> instead of <asm/io.h>
  spi: omap-100k: Clean the value of 'status' is not used
  spi: delete repeated words in comments
  spi: spi-loopback-test: Fix 'tx_buf' might be 'rx_buf'

 drivers/spi/spi-bcm2835aux.c    | 2 +-
 drivers/spi/spi-dw-mmio.c       | 2 +-
 drivers/spi/spi-geni-qcom.c     | 4 ++--
 drivers/spi/spi-loopback-test.c | 2 +-
 drivers/spi/spi-omap-100k.c     | 2 --
 drivers/spi/spi-pl022.c         | 4 ++--
 drivers/spi/spi-ppc4xx.c        | 4 ++--
 7 files changed, 9 insertions(+), 11 deletions(-)

--
2.7.4
parents bf2509a4 9e37a3ab
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+1 −1
Original line number Diff line number Diff line
@@ -384,7 +384,7 @@ static int bcm2835aux_spi_transfer_one(struct spi_master *master,
	bs->pending = 0;

	/* Calculate the estimated time in us the transfer runs.  Note that
	 * there are are 2 idle clocks cycles after each chunk getting
	 * there are 2 idle clocks cycles after each chunk getting
	 * transferred - in our case the chunk size is 3 bytes, so we
	 * approximate this by 9 cycles/byte.  This is used to find the number
	 * of Hz per byte per polling limit.  E.g., we can transfer 1 byte in
+1 −1
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ struct dw_spi_mscc {
/*
 * The Designware SPI controller (referred to as master in the documentation)
 * automatically deasserts chip select when the tx fifo is empty. The chip
 * selects then needs to be either driven as GPIOs or, for the first 4 using the
 * selects then needs to be either driven as GPIOs or, for the first 4 using
 * the SPI boot controller registers. the final chip select is an OR gate
 * between the Designware SPI controller and the SPI boot controller.
 */
+2 −2
Original line number Diff line number Diff line
@@ -639,8 +639,8 @@ static irqreturn_t geni_spi_isr(int irq, void *data)
		complete(&mas->abort_done);

	/*
	 * It's safe or a good idea to Ack all of our our interrupts at the
	 * end of the function. Specifically:
	 * It's safe or a good idea to Ack all of our interrupts at the end
	 * of the function. Specifically:
	 * - M_CMD_DONE_EN / M_RX_FIFO_LAST_EN: Edge triggered interrupts and
	 *   clearing Acks. Clearing at the end relies on nobody else having
	 *   started a new transfer yet or else we could be clearing _their_
+1 −1
Original line number Diff line number Diff line
@@ -875,7 +875,7 @@ static int spi_test_run_iter(struct spi_device *spi,
		test.transfers[i].len = len;
		if (test.transfers[i].tx_buf)
			test.transfers[i].tx_buf += tx_off;
		if (test.transfers[i].tx_buf)
		if (test.transfers[i].rx_buf)
			test.transfers[i].rx_buf += rx_off;
	}

+0 −2
Original line number Diff line number Diff line
@@ -296,7 +296,6 @@ static int omap1_spi100k_transfer_one_message(struct spi_master *master,

	list_for_each_entry(t, &m->transfers, transfer_list) {
		if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) {
			status = -EINVAL;
			break;
		}
		status = omap1_spi100k_setup_transfer(spi, t);
@@ -315,7 +314,6 @@ static int omap1_spi100k_transfer_one_message(struct spi_master *master,
			m->actual_length += count;

			if (count != t->len) {
				status = -EIO;
				break;
			}
		}
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