Loading drivers/dma/at_hdmac.c +4 −4 Original line number Diff line number Diff line Loading @@ -169,9 +169,9 @@ static void atc_desc_put(struct at_dma_chan *atchan, struct at_desc *desc) } /** * atc_desc_chain - build chain adding a descripor * @first: address of first descripor of the chain * @prev: address of previous descripor of the chain * atc_desc_chain - build chain adding a descriptor * @first: address of first descriptor of the chain * @prev: address of previous descriptor of the chain * @desc: descriptor to queue * * Called from prep_* functions Loading Loading @@ -786,7 +786,7 @@ atc_dma_cyclic_check_values(unsigned int reg_width, dma_addr_t buf_addr, } /** * atc_dma_cyclic_fill_desc - Fill one period decriptor * atc_dma_cyclic_fill_desc - Fill one period descriptor */ static int atc_dma_cyclic_fill_desc(struct dma_chan *chan, struct at_desc *desc, Loading drivers/dma/ep93xx_dma.c +1 −1 Original line number Diff line number Diff line Loading @@ -1118,7 +1118,7 @@ ep93xx_dma_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, * @chan: channel * @dma_addr: DMA mapped address of the buffer * @buf_len: length of the buffer (in bytes) * @period_len: lenght of a single period * @period_len: length of a single period * @dir: direction of the operation * @context: operation context (ignored) * Loading drivers/dma/fsldma.c +1 −1 Original line number Diff line number Diff line Loading @@ -1015,7 +1015,7 @@ static irqreturn_t fsldma_chan_irq(int irq, void *data) /* * Programming Error * The DMA_INTERRUPT async_tx is a NULL transfer, which will * triger a PE interrupt. * trigger a PE interrupt. */ if (stat & FSL_DMA_SR_PE) { chan_dbg(chan, "irq: Programming Error INT\n"); Loading drivers/dma/imx-dma.c +2 −2 Original line number Diff line number Diff line Loading @@ -571,8 +571,8 @@ static void imxdma_tasklet(unsigned long data) if (desc->desc.callback) desc->desc.callback(desc->desc.callback_param); /* If we are dealing with a cyclic descriptor keep it on ld_active * and dont mark the descripor as complete. /* If we are dealing with a cyclic descriptor, keep it on ld_active * and dont mark the descriptor as complete. * Only in non-cyclic cases it would be marked as complete */ if (imxdma_chan_is_doing_cyclic(imxdmac)) Loading drivers/dma/intel_mid_dma_regs.h +3 −3 Original line number Diff line number Diff line Loading @@ -168,9 +168,9 @@ union intel_mid_dma_cfg_hi { * @active_list: current active descriptors * @queue: current queued up descriptors * @free_list: current free descriptors * @slave: dma slave struture * @descs_allocated: total number of decsiptors allocated * @dma: dma device struture pointer * @slave: dma slave structure * @descs_allocated: total number of descriptors allocated * @dma: dma device structure pointer * @busy: bool representing if ch is busy (active txn) or not * @in_use: bool representing if ch is in use or not * @raw_tfr: raw trf interrupt received Loading Loading
drivers/dma/at_hdmac.c +4 −4 Original line number Diff line number Diff line Loading @@ -169,9 +169,9 @@ static void atc_desc_put(struct at_dma_chan *atchan, struct at_desc *desc) } /** * atc_desc_chain - build chain adding a descripor * @first: address of first descripor of the chain * @prev: address of previous descripor of the chain * atc_desc_chain - build chain adding a descriptor * @first: address of first descriptor of the chain * @prev: address of previous descriptor of the chain * @desc: descriptor to queue * * Called from prep_* functions Loading Loading @@ -786,7 +786,7 @@ atc_dma_cyclic_check_values(unsigned int reg_width, dma_addr_t buf_addr, } /** * atc_dma_cyclic_fill_desc - Fill one period decriptor * atc_dma_cyclic_fill_desc - Fill one period descriptor */ static int atc_dma_cyclic_fill_desc(struct dma_chan *chan, struct at_desc *desc, Loading
drivers/dma/ep93xx_dma.c +1 −1 Original line number Diff line number Diff line Loading @@ -1118,7 +1118,7 @@ ep93xx_dma_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, * @chan: channel * @dma_addr: DMA mapped address of the buffer * @buf_len: length of the buffer (in bytes) * @period_len: lenght of a single period * @period_len: length of a single period * @dir: direction of the operation * @context: operation context (ignored) * Loading
drivers/dma/fsldma.c +1 −1 Original line number Diff line number Diff line Loading @@ -1015,7 +1015,7 @@ static irqreturn_t fsldma_chan_irq(int irq, void *data) /* * Programming Error * The DMA_INTERRUPT async_tx is a NULL transfer, which will * triger a PE interrupt. * trigger a PE interrupt. */ if (stat & FSL_DMA_SR_PE) { chan_dbg(chan, "irq: Programming Error INT\n"); Loading
drivers/dma/imx-dma.c +2 −2 Original line number Diff line number Diff line Loading @@ -571,8 +571,8 @@ static void imxdma_tasklet(unsigned long data) if (desc->desc.callback) desc->desc.callback(desc->desc.callback_param); /* If we are dealing with a cyclic descriptor keep it on ld_active * and dont mark the descripor as complete. /* If we are dealing with a cyclic descriptor, keep it on ld_active * and dont mark the descriptor as complete. * Only in non-cyclic cases it would be marked as complete */ if (imxdma_chan_is_doing_cyclic(imxdmac)) Loading
drivers/dma/intel_mid_dma_regs.h +3 −3 Original line number Diff line number Diff line Loading @@ -168,9 +168,9 @@ union intel_mid_dma_cfg_hi { * @active_list: current active descriptors * @queue: current queued up descriptors * @free_list: current free descriptors * @slave: dma slave struture * @descs_allocated: total number of decsiptors allocated * @dma: dma device struture pointer * @slave: dma slave structure * @descs_allocated: total number of descriptors allocated * @dma: dma device structure pointer * @busy: bool representing if ch is busy (active txn) or not * @in_use: bool representing if ch is in use or not * @raw_tfr: raw trf interrupt received Loading