Commit d9c36d01 authored by Conor Dooley's avatar Conor Dooley
Browse files

Merge patch series "Add a devicetree for the Aldec PolarFire SoC TySoM" 



As it says on the tin, add a DT for this board. It's been sitting on my
desk for a while, so may as well have it upstream...

The DT is only partially complete, as it needs the fabric content added.
Unfortunately, I don't have a reference design in RTL or SmartDesign
for it and therefore don't know what that fabric content is.

Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
parents 093ee97e 497e6b37

Documentation/devicetree/bindings/riscv/microchip.yaml

+1 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ properties: 


      - items:

          - enum:

              - aldec,tysom-m-mpfs250t-rev2

              - aries,m100pfsevp

              - microchip,mpfs-sev-kit

              - sundance,polarberry

Documentation/devicetree/bindings/vendor-prefixes.yaml

+2 −0
Original line number Diff line number Diff line
@@ -69,6 +69,8 @@ patternProperties: 
    description: Annapurna Labs

  "^alcatel,.*":

    description: Alcatel

  "^aldec,.*":

    description: Aldec, Inc.

  "^alfa-network,.*":

    description: ALFA Network Inc.

  "^allegro,.*":

arch/riscv/boot/dts/microchip/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -3,4 +3,5 @@ dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb 
dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb

dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-tysom-m.dtb

obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y))

arch/riscv/boot/dts/microchip/mpfs-tysom-m-fabric.dtsi

0 → 100644
+18 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0 OR MIT)

/* Copyright (c) 2022 Microchip Technology Inc */



// #include "dt-bindings/mailbox/miv-ihc.h"



/ {

	fabric_clk3: fabric-clk3 {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <62500000>;

	};



	fabric_clk1: fabric-clk1 {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <125000000>;

	};

};

arch/riscv/boot/dts/microchip/mpfs-tysom-m.dts

0 → 100644
+165 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/*

 * Original all-in-one devicetree:

 * Copyright (C) 2020-2022 - Aldec

 * Rewritten to use includes:

 * Copyright (C) 2022 - Conor Dooley <conor.dooley@microchip.com>

 */



/dts-v1/;



#include "mpfs.dtsi"

#include "mpfs-tysom-m-fabric.dtsi"



/* Clock frequency (in Hz) of the rtcclk */

#define MTIMER_FREQ		1000000



/ {

	model = "Aldec TySOM-M-MPFS250T-REV2";

	compatible = "aldec,tysom-m-mpfs250t-rev2", "microchip,mpfs";



	aliases {

		ethernet0 = &mac0;

		ethernet1 = &mac1;

		serial0 = &mmuart0;

		serial1 = &mmuart1;

		serial2 = &mmuart2;

		serial3 = &mmuart3;

		serial4 = &mmuart4;

		gpio0 = &gpio0;

		gpio1 = &gpio2;

	};



	chosen {

		stdout-path = "serial1:115200n8";

	};



	cpus {

		timebase-frequency = <MTIMER_FREQ>;

	};



	ddrc_cache_lo: memory@80000000 {

		device_type = "memory";

		reg = <0x0 0x80000000 0x0 0x30000000>;

		status = "okay";

	};



	ddrc_cache_hi: memory@1000000000 {

		device_type = "memory";

		reg = <0x10 0x00000000 0x0 0x40000000>;

		status = "okay";

	};



	leds {

		compatible = "gpio-leds";

		status = "okay";



		led0 {

			gpios = <&gpio1 23 1>;

			default-state = "on";

			linux,default-trigger = "heartbeat";

		};

	};

};



&i2c0 {

	status = "okay";

};



&i2c1 {

	status = "okay";

	hwmon: hwmon@45 {

		status = "okay";

		compatible = "ti,ina219";

		reg = <0x45>;

		shunt-resistor = <2000>;

	};

};



&gpio1 {

	interrupts = <27>, <28>, <29>, <30>,

		     <31>, <32>, <33>, <47>,

		     <35>, <36>, <37>, <38>,

		     <39>, <40>, <41>, <42>,

		     <43>, <44>, <45>, <46>,

		     <47>, <48>, <49>, <50>;

	status = "okay";

};



&mac0 {

	status = "okay";

	phy-mode = "gmii";

	phy-handle = <&phy0>;



};



&mac1 {

	status = "okay";

	phy-mode = "gmii";

	phy-handle = <&phy1>;

	phy1: ethernet-phy@1 {

		reg = <1>;

	};

	phy0: ethernet-phy@0 {

		reg = <0>;

	};

};



&mbox {

	status = "okay";

};



&mmc {

	max-frequency = <200000000>;

	cap-mmc-highspeed;

	cap-sd-highspeed;

	no-1-8-v;

	disable-wp;

	status = "okay";

};



&mmuart1 {

	status = "okay";

};



&mmuart2 {

	status = "okay";

};



&mmuart3 {

	status = "okay";

};



&mmuart4 {

	status = "okay";

};



&refclk {

	clock-frequency = <125000000>;

};



&rtc {

	status = "okay";

};



&spi0 {

	status = "okay";

};



&spi1 {

	status = "okay";

	flash@0 {

		compatible = "micron,n25q128a11", "jedec,spi-nor";

		reg = <0x0>;

		spi-max-frequency = <10000000>;

	};

};



&syscontroller {

	status = "okay";

};



&usb {

	status = "okay";

	dr_mode = "host";

};