Merge existing fixes from spi/for-5.14 (da18edb1) · Commits · jan.koester / Linux

drivers/spi/spi-imx.c

+19 −19

Original line number	Diff line number	Diff line
		@@ -506,7 +506,7 @@ static int mx51_ecspi_prepare_message(struct spi_imx_data *spi_imx,
		{
		struct spi_device *spi = msg->spi;
		u32 ctrl = MX51_ECSPI_CTRL_ENABLE;
		u32 testreg;
		u32 testreg, delay;
		u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG);

		/* set Master or Slave mode */
		@@ -567,6 +567,23 @@ static int mx51_ecspi_prepare_message(struct spi_imx_data *spi_imx,

		writel(cfg, spi_imx->base + MX51_ECSPI_CONFIG);

		/*
		* Wait until the changes in the configuration register CONFIGREG
		* propagate into the hardware. It takes exactly one tick of the
		* SCLK clock, but we will wait two SCLK clock just to be sure. The
		* effect of the delay it takes for the hardware to apply changes
		* is noticable if the SCLK clock run very slow. In such a case, if
		* the polarity of SCLK should be inverted, the GPIO ChipSelect might
		* be asserted before the SCLK polarity changes, which would disrupt
		* the SPI communication as the device on the other end would consider
		* the change of SCLK polarity as a clock tick already.
		*/
		delay = (2 * 1000000) / spi_imx->spi_bus_clk;
		if (likely(delay < 10)) /* SCLK is faster than 100 kHz */
		udelay(delay);
		else /* SCLK is _very_ slow */
		usleep_range(delay, delay + 10);

		return 0;
		}

		@@ -574,7 +591,7 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
		struct spi_device *spi)
		{
		u32 ctrl = readl(spi_imx->base + MX51_ECSPI_CTRL);
		u32 clk, delay;
		u32 clk;

		/* Clear BL field and set the right value */
		ctrl &= ~MX51_ECSPI_CTRL_BL_MASK;
		@@ -596,23 +613,6 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,

		writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);

		/*
		* Wait until the changes in the configuration register CONFIGREG
		* propagate into the hardware. It takes exactly one tick of the
		* SCLK clock, but we will wait two SCLK clock just to be sure. The
		* effect of the delay it takes for the hardware to apply changes
		* is noticable if the SCLK clock run very slow. In such a case, if
		* the polarity of SCLK should be inverted, the GPIO ChipSelect might
		* be asserted before the SCLK polarity changes, which would disrupt
		* the SPI communication as the device on the other end would consider
		* the change of SCLK polarity as a clock tick already.
		*/
		delay = (2 * 1000000) / clk;
		if (likely(delay < 10)) /* SCLK is faster than 100 kHz */
		udelay(delay);
		else /* SCLK is _very_ slow */
		usleep_range(delay, delay + 10);

		return 0;
		}

drivers/spi/spi-stm32.c

+17 −7

Original line number	Diff line number	Diff line
		@@ -884,15 +884,18 @@ static irqreturn_t stm32h7_spi_irq_thread(int irq, void *dev_id)
		ier = readl_relaxed(spi->base + STM32H7_SPI_IER);

		mask = ier;
		/* EOTIE is triggered on EOT, SUSP and TXC events. */
		/*
		* EOTIE enables irq from EOT, SUSP and TXC events. We need to set
		* SUSP to acknowledge it later. TXC is automatically cleared
		*/

		mask \|= STM32H7_SPI_SR_SUSP;
		/*
		* When TXTF is set, DXPIE and TXPIE are cleared. So in case of
		* Full-Duplex, need to poll RXP event to know if there are remaining
		* data, before disabling SPI.
		* DXPIE is set in Full-Duplex, one IT will be raised if TXP and RXP
		* are set. So in case of Full-Duplex, need to poll TXP and RXP event.
		*/
		if (spi->rx_buf && !spi->cur_usedma)
		mask \|= STM32H7_SPI_SR_RXP;
		if ((spi->cur_comm == SPI_FULL_DUPLEX) && !spi->cur_usedma)
		mask \|= STM32H7_SPI_SR_TXP \| STM32H7_SPI_SR_RXP;

		if (!(sr & mask)) {
		dev_warn(spi->dev, "spurious IT (sr=0x%08x, ier=0x%08x)\n",
		@@ -1925,6 +1928,7 @@ static int stm32_spi_probe(struct platform_device *pdev)
		master->can_dma = stm32_spi_can_dma;

		pm_runtime_set_active(&pdev->dev);
		pm_runtime_get_noresume(&pdev->dev);
		pm_runtime_enable(&pdev->dev);

		ret = spi_register_master(master);
		@@ -1940,6 +1944,8 @@ static int stm32_spi_probe(struct platform_device *pdev)

		err_pm_disable:
		pm_runtime_disable(&pdev->dev);
		pm_runtime_put_noidle(&pdev->dev);
		pm_runtime_set_suspended(&pdev->dev);
		err_dma_release:
		if (spi->dma_tx)
		dma_release_channel(spi->dma_tx);
		@@ -1956,9 +1962,14 @@ static int stm32_spi_remove(struct platform_device *pdev)
		struct spi_master *master = platform_get_drvdata(pdev);
		struct stm32_spi *spi = spi_master_get_devdata(master);

		pm_runtime_get_sync(&pdev->dev);

		spi_unregister_master(master);
		spi->cfg->disable(spi);

		pm_runtime_disable(&pdev->dev);
		pm_runtime_put_noidle(&pdev->dev);
		pm_runtime_set_suspended(&pdev->dev);
		if (master->dma_tx)
		dma_release_channel(master->dma_tx);
		if (master->dma_rx)
		@@ -1966,7 +1977,6 @@ static int stm32_spi_remove(struct platform_device *pdev)

		clk_disable_unprepare(spi->clk);

		pm_runtime_disable(&pdev->dev);

		pinctrl_pm_select_sleep_state(&pdev->dev);