Commit da41645f authored by Cédric Le Goater's avatar Cédric Le Goater Committed by Joel Stanley
Browse files

ARM: dts: aspeed: ast2600-evb: Enable Quad SPI RX tranfers 



Now that the pinctrl definitions of the ast2600 SoC have been fixed,
see commit 925fbe1f ("dt-bindings: pinctrl: aspeed-g6: add FWQSPI
function/group"), it is safe to activate QSPI on the ast2600 evb.

Cc: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Tested-by: default avatarJae Hyun Yoo <quic_jaehyoo@quicinc.com>
Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
Link: https://lore.kernel.org/r/20220603073705.1624351-1-clg@kaod.org


Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent e360b84c

arch/arm/boot/dts/aspeed-ast2600-evb.dts

+2 −0
Original line number Diff line number Diff line
@@ -182,6 +182,7 @@ flash@0 { 
		status = "okay";

		m25p,fast-read;

		label = "bmc";

		spi-rx-bus-width = <4>;

		spi-max-frequency = <50000000>;

#include "openbmc-flash-layout-64.dtsi"

	};
@@ -196,6 +197,7 @@ flash@0 { 
		status = "okay";

		m25p,fast-read;

		label = "pnor";

		spi-rx-bus-width = <4>;

		spi-max-frequency = <100000000>;

	};

};