Unverified Commit db56d030 authored May 10, 2021 by Jay Fang Committed by Mark Brown May 10, 2021

spi: delete repeated words in comments



Drop repeated words in spi-bcm2835aux.c
{are}

Drop repeated words in spi-dw-mmio.c
{the}

Drop repeated words in spi-geni-qcom.c
{our}

Drop repeated words in spi-pl022.c
{on}

Drop repeated words in spi-ppc4xx.c
{the}

Signed-off-by: Jay Fang <f.fangjian@huawei.com>
Link: https://lore.kernel.org/r/1620629903-15493-4-git-send-email-f.fangjian@huawei.com


Signed-off-by: Mark Brown <broonie@kernel.org>

parent 856a9260

drivers/spi/spi-bcm2835aux.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -384,7 +384,7 @@ static int bcm2835aux_spi_transfer_one(struct spi_master *master,
		bs->pending = 0;

		/* Calculate the estimated time in us the transfer runs. Note that
		* there are are 2 idle clocks cycles after each chunk getting
		* there are 2 idle clocks cycles after each chunk getting
		* transferred - in our case the chunk size is 3 bytes, so we
		* approximate this by 9 cycles/byte. This is used to find the number
		* of Hz per byte per polling limit. E.g., we can transfer 1 byte in

drivers/spi/spi-dw-mmio.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -56,7 +56,7 @@ struct dw_spi_mscc {
		/*
		* The Designware SPI controller (referred to as master in the documentation)
		* automatically deasserts chip select when the tx fifo is empty. The chip
		* selects then needs to be either driven as GPIOs or, for the first 4 using the
		* selects then needs to be either driven as GPIOs or, for the first 4 using
		* the SPI boot controller registers. the final chip select is an OR gate
		* between the Designware SPI controller and the SPI boot controller.
		*/

drivers/spi/spi-geni-qcom.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -639,8 +639,8 @@ static irqreturn_t geni_spi_isr(int irq, void *data)
		complete(&mas->abort_done);

		/*
		* It's safe or a good idea to Ack all of our our interrupts at the
		* end of the function. Specifically:
		* It's safe or a good idea to Ack all of our interrupts at the end
		* of the function. Specifically:
		* - M_CMD_DONE_EN / M_RX_FIFO_LAST_EN: Edge triggered interrupts and
		* clearing Acks. Clearing at the end relies on nobody else having
		* started a new transfer yet or else we could be clearing _their_

drivers/spi/spi-pl022.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -288,7 +288,7 @@
		#define SPI_POLLING_TIMEOUT 1000

		/*
		* The type of reading going on on this chip
		* The type of reading going on this chip
		*/
		enum ssp_reading {
		READING_NULL,
		@@ -298,7 +298,7 @@ enum ssp_reading {
		};

		/*
		* The type of writing going on on this chip
		* The type of writing going on this chip
		*/
		enum ssp_writing {
		WRITING_NULL,

drivers/spi/spi-ppc4xx.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -326,7 +326,7 @@ static void spi_ppc4xx_enable(struct ppc4xx_spi *hw)
		{
		/*
		* On all 4xx PPC's the SPI bus is shared/multiplexed with
		* the 2nd I2C bus. We need to enable the the SPI bus before
		* the 2nd I2C bus. We need to enable the SPI bus before
		* using it.
		*/