Commit dc2b9c70 authored by Gavin Wan's avatar Gavin Wan Committed by Alex Deucher
Browse files

drm/amdgpu: fix scratch register access method in SRIOV 



The scratch register should be accessed through MMIO instead of RLCG
in SRIOV, since it being used in RLCG register access function.

Fixes: d54762cc ("drm/amdgpu: nuke dynamic gfx scratch reg allocation")
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarGavin Wan <Gavin.Wan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 86bd6706

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+4 −4
Original line number Diff line number Diff line
@@ -987,23 +987,23 @@ static void gfx_v9_0_wait_reg_mem(struct amdgpu_ring *ring, int eng_sel, 
static int gfx_v9_0_ring_test_ring(struct amdgpu_ring *ring)

{

	struct amdgpu_device *adev = ring->adev;

	uint32_t scratch = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0);

	uint32_t tmp = 0;

	unsigned i;

	int r;



	WREG32_SOC15(GC, 0, mmSCRATCH_REG0, 0xCAFEDEAD);

	WREG32(scratch, 0xCAFEDEAD);

	r = amdgpu_ring_alloc(ring, 3);

	if (r)

		return r;



	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

	amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0) -

			  PACKET3_SET_UCONFIG_REG_START);

	amdgpu_ring_write(ring, scratch - PACKET3_SET_UCONFIG_REG_START);

	amdgpu_ring_write(ring, 0xDEADBEEF);

	amdgpu_ring_commit(ring);



	for (i = 0; i < adev->usec_timeout; i++) {

		tmp = RREG32_SOC15(GC, 0, mmSCRATCH_REG0);

		tmp = RREG32(scratch);

		if (tmp == 0xDEADBEEF)

			break;

		udelay(1);