Commit dc43fc75 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86_mtrr_for_v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 mtrr updates from Borislav Petkov:
 "A serious scrubbing of the MTRR code including adding a new map
  mechanism in order to look up the memory type of a region easily.

  Also address memory range lookup issues like returning an invalid
  memory type. Furthermore, this handles the decoupling of PAT from MTRR
  more naturally.

  All work by Juergen Gross"

* tag 'x86_mtrr_for_v6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/xen: Set default memory type for PV guests to WB
  x86/mtrr: Unify debugging printing
  x86/mtrr: Remove unused code
  x86/mm: Only check uniform after calling mtrr_type_lookup()
  x86/mtrr: Don't let mtrr_type_lookup() return MTRR_TYPE_INVALID
  x86/mtrr: Use new cache_map in mtrr_type_lookup()
  x86/mtrr: Add mtrr=debug command line option
  x86/mtrr: Construct a memory map with cache modes
  x86/mtrr: Add get_effective_type() service function
  x86/mtrr: Allocate mtrr_value array dynamically
  x86/mtrr: Move 32-bit code from mtrr.c to legacy.c
  x86/mtrr: Have only one set_mtrr() variant
  x86/mtrr: Replace vendor tests in MTRR code
  x86/xen: Set MTRR state when running as Xen PV initial domain
  x86/hyperv: Set MTRR state when running as SEV-SNP Hyper-V guest
  x86/mtrr: Support setting MTRR state for software defined MTRRs
  x86/mtrr: Replace size_or_mask and size_and_mask with a much easier concept
  x86/mtrr: Remove physical address size calculation
parents 4baa098a 30d65d1b

Documentation/admin-guide/kernel-parameters.txt

+4 −0
Original line number Diff line number Diff line
@@ -3433,6 +3433,10 @@ 
			[HW] Make the MicroTouch USB driver use raw coordinates

			('y', default) or cooked coordinates ('n')



	mtrr=debug	[X86]

			Enable printing debug information related to MTRR

			registers at boot time.



	mtrr_chunk_size=nn[KMG] [X86]

			used for mtrr cleanup. It is largest continuous chunk

			that could hold holes aka. UC entries.

arch/x86/hyperv/ivm.c

+4 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ 
#include <asm/mem_encrypt.h>

#include <asm/mshyperv.h>

#include <asm/hypervisor.h>

#include <asm/mtrr.h>



#ifdef CONFIG_AMD_MEM_ENCRYPT
@@ -372,6 +373,9 @@ void __init hv_vtom_init(void) 
	x86_platform.guest.enc_cache_flush_required = hv_vtom_cache_flush_required;

	x86_platform.guest.enc_tlb_flush_required = hv_vtom_tlb_flush_required;

	x86_platform.guest.enc_status_change_finish = hv_vtom_set_host_visibility;



	/* Set WB as the default cache mode. */

	mtrr_overwrite_state(NULL, 0, MTRR_TYPE_WRBACK);

}



#endif /* CONFIG_AMD_MEM_ENCRYPT */

arch/x86/include/asm/mtrr.h

+43 −8
Original line number Diff line number Diff line
@@ -23,14 +23,43 @@ 
#ifndef _ASM_X86_MTRR_H

#define _ASM_X86_MTRR_H



#include <linux/bits.h>

#include <uapi/asm/mtrr.h>



/* Defines for hardware MTRR registers. */

#define MTRR_CAP_VCNT		GENMASK(7, 0)

#define MTRR_CAP_FIX		BIT_MASK(8)

#define MTRR_CAP_WC		BIT_MASK(10)



#define MTRR_DEF_TYPE_TYPE	GENMASK(7, 0)

#define MTRR_DEF_TYPE_FE	BIT_MASK(10)

#define MTRR_DEF_TYPE_E		BIT_MASK(11)



#define MTRR_DEF_TYPE_ENABLE	(MTRR_DEF_TYPE_FE | MTRR_DEF_TYPE_E)

#define MTRR_DEF_TYPE_DISABLE	~(MTRR_DEF_TYPE_TYPE | MTRR_DEF_TYPE_ENABLE)



#define MTRR_PHYSBASE_TYPE	GENMASK(7, 0)

#define MTRR_PHYSBASE_RSVD	GENMASK(11, 8)



#define MTRR_PHYSMASK_RSVD	GENMASK(10, 0)

#define MTRR_PHYSMASK_V		BIT_MASK(11)



struct mtrr_state_type {

	struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES];

	mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES];

	unsigned char enabled;

	bool have_fixed;

	mtrr_type def_type;

};



/*

 * The following functions are for use by other drivers that cannot use

 * arch_phys_wc_add and arch_phys_wc_del.

 */

# ifdef CONFIG_MTRR

void mtrr_bp_init(void);

void mtrr_overwrite_state(struct mtrr_var_range *var, unsigned int num_var,

			  mtrr_type def_type);

extern u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform);

extern void mtrr_save_fixed_ranges(void *);

extern void mtrr_save_state(void);
@@ -40,7 +69,6 @@ extern int mtrr_add_page(unsigned long base, unsigned long size, 
			 unsigned int type, bool increment);

extern int mtrr_del(int reg, unsigned long base, unsigned long size);

extern int mtrr_del_page(int reg, unsigned long base, unsigned long size);

extern void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi);

extern void mtrr_bp_restore(void);

extern int mtrr_trim_uncached_memory(unsigned long end_pfn);

extern int amd_special_default_mtrr(void);
@@ -48,12 +76,21 @@ void mtrr_disable(void); 
void mtrr_enable(void);

void mtrr_generic_set_state(void);

#  else

static inline void mtrr_overwrite_state(struct mtrr_var_range *var,

					unsigned int num_var,

					mtrr_type def_type)

{

}



static inline u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform)

{

	/*

	 * Return no-MTRRs:

	 * Return the default MTRR type, without any known other types in

	 * that range.

	 */

	return MTRR_TYPE_INVALID;

	*uniform = 1;



	return MTRR_TYPE_UNCACHABLE;

}

#define mtrr_save_fixed_ranges(arg) do {} while (0)

#define mtrr_save_state() do {} while (0)
@@ -79,9 +116,6 @@ static inline int mtrr_trim_uncached_memory(unsigned long end_pfn) 
{

	return 0;

}

static inline void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi)

{

}

#define mtrr_bp_init() do {} while (0)

#define mtrr_bp_restore() do {} while (0)

#define mtrr_disable() do {} while (0)
@@ -121,7 +155,8 @@ struct mtrr_gentry32 { 
#endif /* CONFIG_COMPAT */



/* Bit fields for enabled in struct mtrr_state_type */

#define MTRR_STATE_MTRR_FIXED_ENABLED	0x01

#define MTRR_STATE_MTRR_ENABLED		0x02

#define MTRR_STATE_SHIFT		10

#define MTRR_STATE_MTRR_FIXED_ENABLED	(MTRR_DEF_TYPE_FE >> MTRR_STATE_SHIFT)

#define MTRR_STATE_MTRR_ENABLED		(MTRR_DEF_TYPE_E >> MTRR_STATE_SHIFT)



#endif /* _ASM_X86_MTRR_H */

arch/x86/include/uapi/asm/mtrr.h

+3 −11
Original line number Diff line number Diff line
@@ -81,14 +81,6 @@ typedef __u8 mtrr_type; 
#define MTRR_NUM_FIXED_RANGES 88

#define MTRR_MAX_VAR_RANGES 256



struct mtrr_state_type {

	struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES];

	mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES];

	unsigned char enabled;

	unsigned char have_fixed;

	mtrr_type def_type;

};



#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))

#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
@@ -115,9 +107,9 @@ struct mtrr_state_type { 
#define MTRR_NUM_TYPES       7



/*

 * Invalid MTRR memory type.  mtrr_type_lookup() returns this value when

 * MTRRs are disabled.  Note, this value is allocated from the reserved

 * values (0x7-0xff) of the MTRR memory types.

 * Invalid MTRR memory type.  No longer used outside of MTRR code.

 * Note, this value is allocated from the reserved values (0x7-0xff) of

 * the MTRR memory types.

 */

#define MTRR_TYPE_INVALID    0xff

arch/x86/kernel/cpu/mtrr/Makefile

+1 −1
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0-only

obj-y		:= mtrr.o if.o generic.o cleanup.o

obj-$(CONFIG_X86_32) += amd.o cyrix.o centaur.o

obj-$(CONFIG_X86_32) += amd.o cyrix.o centaur.o legacy.o