Commit dc6ae205 authored by Arınç ÜNAL's avatar Arınç ÜNAL Committed by Linus Walleij
Browse files

pinctrl: ralink: move to mediatek as mtmips



This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek
introduced new SoCs which utilise this platform. Move the driver to
mediatek pinctrl directory. Rename the ralink core driver to mtmips.

Signed-off-by: default avatarArınç ÜNAL <arinc.unal@arinc9.com>
Link: https://lore.kernel.org/r/20230317213011.13656-5-arinc.unal@arinc9.com


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent f7dedad4
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+0 −1
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@@ -538,7 +538,6 @@ source "drivers/pinctrl/nuvoton/Kconfig"
source "drivers/pinctrl/nxp/Kconfig"
source "drivers/pinctrl/pxa/Kconfig"
source "drivers/pinctrl/qcom/Kconfig"
source "drivers/pinctrl/ralink/Kconfig"
source "drivers/pinctrl/renesas/Kconfig"
source "drivers/pinctrl/samsung/Kconfig"
source "drivers/pinctrl/spear/Kconfig"
+0 −1
Original line number Diff line number Diff line
@@ -67,7 +67,6 @@ obj-y += nuvoton/
obj-y				+= nxp/
obj-$(CONFIG_PINCTRL_PXA)	+= pxa/
obj-$(CONFIG_ARCH_QCOM)		+= qcom/
obj-$(CONFIG_PINCTRL_RALINK)	+= ralink/
obj-$(CONFIG_PINCTRL_RENESAS)	+= renesas/
obj-$(CONFIG_PINCTRL_SAMSUNG)	+= samsung/
obj-$(CONFIG_PINCTRL_SPEAR)	+= spear/
+50 −1
Original line number Diff line number Diff line
# SPDX-License-Identifier: GPL-2.0-only
menu "MediaTek pinctrl drivers"
	depends on ARCH_MEDIATEK || COMPILE_TEST
	depends on ARCH_MEDIATEK || RALINK || COMPILE_TEST

config EINT_MTK
	tristate "MediaTek External Interrupt Support"
@@ -22,6 +22,12 @@ config PINCTRL_MTK
config PINCTRL_MTK_V2
	tristate

config PINCTRL_MTK_MTMIPS
	bool
	depends on RALINK
	select PINMUX
	select GENERIC_PINCONF

config PINCTRL_MTK_MOORE
	bool
	depends on OF
@@ -43,6 +49,49 @@ config PINCTRL_MTK_PARIS
	select OF_GPIO
	select PINCTRL_MTK_V2

# For MIPS SoCs
config PINCTRL_MT7620
	bool "MediaTek MT7620 pin control"
	depends on SOC_MT7620 || COMPILE_TEST
	depends on RALINK
	default SOC_MT7620
	select PINCTRL_MTK_MTMIPS

config PINCTRL_MT7621
	bool "MediaTek MT7621 pin control"
	depends on SOC_MT7621 || COMPILE_TEST
	depends on RALINK
	default SOC_MT7621
	select PINCTRL_MTK_MTMIPS

config PINCTRL_MT76X8
	bool "MediaTek MT76X8 pin control"
	depends on SOC_MT7620 || COMPILE_TEST
	depends on RALINK
	default SOC_MT7620
	select PINCTRL_MTK_MTMIPS

config PINCTRL_RT2880
	bool "Ralink RT2880 pin control"
	depends on SOC_RT288X || COMPILE_TEST
	depends on RALINK
	default SOC_RT288X
	select PINCTRL_MTK_MTMIPS

config PINCTRL_RT305X
	bool "Ralink RT305X pin control"
	depends on SOC_RT305X || COMPILE_TEST
	depends on RALINK
	default SOC_RT305X
	select PINCTRL_MTK_MTMIPS

config PINCTRL_RT3883
	bool "Ralink RT3883 pin control"
	depends on SOC_RT3883 || COMPILE_TEST
	depends on RALINK
	default SOC_RT3883
	select PINCTRL_MTK_MTMIPS

# For ARMv7 SoCs
config PINCTRL_MT2701
	bool "Mediatek MT2701 pin control"
+35 −28
Original line number Diff line number Diff line
@@ -3,10 +3,17 @@
obj-$(CONFIG_EINT_MTK)			+= mtk-eint.o
obj-$(CONFIG_PINCTRL_MTK)		+= pinctrl-mtk-common.o
obj-$(CONFIG_PINCTRL_MTK_V2)		+= pinctrl-mtk-common-v2.o
obj-$(CONFIG_PINCTRL_MTK_MTMIPS)	+= pinctrl-mtmips.o
obj-$(CONFIG_PINCTRL_MTK_MOORE)		+= pinctrl-moore.o
obj-$(CONFIG_PINCTRL_MTK_PARIS)		+= pinctrl-paris.o

# SoC Drivers
obj-$(CONFIG_PINCTRL_MT7620)		+= pinctrl-mt7620.o
obj-$(CONFIG_PINCTRL_MT7621)		+= pinctrl-mt7621.o
obj-$(CONFIG_PINCTRL_MT76X8)		+= pinctrl-mt76x8.o
obj-$(CONFIG_PINCTRL_RT2880)		+= pinctrl-rt2880.o
obj-$(CONFIG_PINCTRL_RT305X)		+= pinctrl-rt305x.o
obj-$(CONFIG_PINCTRL_RT3883)		+= pinctrl-rt3883.o
obj-$(CONFIG_PINCTRL_MT2701)		+= pinctrl-mt2701.o
obj-$(CONFIG_PINCTRL_MT2712)		+= pinctrl-mt2712.o
obj-$(CONFIG_PINCTRL_MT8135)		+= pinctrl-mt8135.o
+17 −17
Original line number Diff line number Diff line
@@ -3,7 +3,7 @@
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include "pinctrl-ralink.h"
#include "pinctrl-mtmips.h"

#define MT7620_GPIO_MODE_UART0_SHIFT	2
#define MT7620_GPIO_MODE_UART0_MASK	0x7
@@ -52,20 +52,20 @@
#define MT7620_GPIO_MODE_EPHY		15
#define MT7620_GPIO_MODE_PA		20

static struct ralink_pmx_func i2c_grp[] =  { FUNC("i2c", 0, 1, 2) };
static struct ralink_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
static struct ralink_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
static struct ralink_pmx_func mdio_grp[] = {
static struct mtmips_pmx_func i2c_grp[] =  { FUNC("i2c", 0, 1, 2) };
static struct mtmips_pmx_func spi_grp[] = { FUNC("spi", 0, 3, 4) };
static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
static struct mtmips_pmx_func mdio_grp[] = {
	FUNC("mdio", MT7620_GPIO_MODE_MDIO, 22, 2),
	FUNC("refclk", MT7620_GPIO_MODE_MDIO_REFCLK, 22, 2),
};
static struct ralink_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 24, 12) };
static struct ralink_pmx_func refclk_grp[] = { FUNC("spi refclk", 0, 37, 3) };
static struct ralink_pmx_func ephy_grp[] = { FUNC("ephy", 0, 40, 5) };
static struct ralink_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 60, 12) };
static struct ralink_pmx_func wled_grp[] = { FUNC("wled", 0, 72, 1) };
static struct ralink_pmx_func pa_grp[] = { FUNC("pa", 0, 18, 4) };
static struct ralink_pmx_func uartf_grp[] = {
static struct mtmips_pmx_func rgmii1_grp[] = { FUNC("rgmii1", 0, 24, 12) };
static struct mtmips_pmx_func refclk_grp[] = { FUNC("spi refclk", 0, 37, 3) };
static struct mtmips_pmx_func ephy_grp[] = { FUNC("ephy", 0, 40, 5) };
static struct mtmips_pmx_func rgmii2_grp[] = { FUNC("rgmii2", 0, 60, 12) };
static struct mtmips_pmx_func wled_grp[] = { FUNC("wled", 0, 72, 1) };
static struct mtmips_pmx_func pa_grp[] = { FUNC("pa", 0, 18, 4) };
static struct mtmips_pmx_func uartf_grp[] = {
	FUNC("uartf", MT7620_GPIO_MODE_UARTF, 7, 8),
	FUNC("pcm uartf", MT7620_GPIO_MODE_PCM_UARTF, 7, 8),
	FUNC("pcm i2s", MT7620_GPIO_MODE_PCM_I2S, 7, 8),
@@ -74,20 +74,20 @@ static struct ralink_pmx_func uartf_grp[] = {
	FUNC("gpio uartf", MT7620_GPIO_MODE_GPIO_UARTF, 7, 4),
	FUNC("gpio i2s", MT7620_GPIO_MODE_GPIO_I2S, 7, 4),
};
static struct ralink_pmx_func wdt_grp[] = {
static struct mtmips_pmx_func wdt_grp[] = {
	FUNC("wdt rst", 0, 17, 1),
	FUNC("wdt refclk", 0, 17, 1),
	};
static struct ralink_pmx_func pcie_rst_grp[] = {
static struct mtmips_pmx_func pcie_rst_grp[] = {
	FUNC("pcie rst", MT7620_GPIO_MODE_PCIE_RST, 36, 1),
	FUNC("pcie refclk", MT7620_GPIO_MODE_PCIE_REF, 36, 1)
};
static struct ralink_pmx_func nd_sd_grp[] = {
static struct mtmips_pmx_func nd_sd_grp[] = {
	FUNC("nand", MT7620_GPIO_MODE_NAND, 45, 15),
	FUNC("sd", MT7620_GPIO_MODE_SD, 47, 13)
};

static struct ralink_pmx_group mt7620a_pinmux_data[] = {
static struct mtmips_pmx_group mt7620a_pinmux_data[] = {
	GRP("i2c", i2c_grp, 1, MT7620_GPIO_MODE_I2C),
	GRP("uartf", uartf_grp, MT7620_GPIO_MODE_UART0_MASK,
		MT7620_GPIO_MODE_UART0_SHIFT),
@@ -112,7 +112,7 @@ static struct ralink_pmx_group mt7620a_pinmux_data[] = {

static int mt7620_pinctrl_probe(struct platform_device *pdev)
{
	return ralink_pinctrl_init(pdev, mt7620a_pinmux_data);
	return mtmips_pinctrl_init(pdev, mt7620a_pinmux_data);
}

static const struct of_device_id mt7620_pinctrl_match[] = {
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