Commit dc8cbdd9 authored by David Yang's avatar David Yang Committed by Wei Xu
Browse files

arm64: dts: hi3798cv200: Fix clocks order of sd0 



"ciu" and "biu" were incorrectly swapped. Fix their order.

Signed-off-by: default avatarDavid Yang <mmyangfl@gmail.com>
Signed-off-by: default avatarWei Xu <xuwei5@hisilicon.com>
parent 942815c2

arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -302,8 +302,8 @@ sd0: mmc@9820000 { 
			compatible = "snps,dw-mshc";

			reg = <0x9820000 0x10000>;

			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg HISTB_SDIO0_CIU_CLK>,

				 <&crg HISTB_SDIO0_BIU_CLK>;

			clocks = <&crg HISTB_SDIO0_BIU_CLK>,

				 <&crg HISTB_SDIO0_CIU_CLK>;

			clock-names = "biu", "ciu";

			resets = <&crg 0x9c 4>;

			reset-names = "reset";